ATTINY15 ATMEL [ATMEL Corporation], ATTINY15 Datasheet - Page 40

• Manufacturer Part Number: ATTINY15
• Manufacturer: ATMEL [ATMEL Corporation]

40
ATtiny15L
• Bit 3 – ACIE: Analog Comparator Interrupt Enable
When the ACIE bit is set (one) and the I-bit in the Status Register is set (one), the Ana-
log Comparator Interrupt is activated. When cleared (zero), the interrupt is disabled.
• Bit 2 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny15L and will always read as zero.
• Bits 1, 0 – ACIS1, ACIS0: Analog Comparator Interrupt Mode Select
These bits determine the comparator events that trigger the Analog Comparator Inter-
rupt. The different settings are shown in Table 17.
Table 17. ACIS1/ACIS0 Settings
Note:
ACIS1
0
0
1
1
1. When changing the ACIS1/ACIS0 bits, The Analog Comparator Interrupt must be dis-
abled by clearing its Interrupt Enable bit in the ACSR register. Otherwise an interrupt
can occur when the bits are changed.
ACIS0
0
1
0
1
Interrupt Mode
Comparator Interrupt on Output Toggle
Reserved
Comparator Interrupt on Falling Output Edge
Comparator Interrupt on Rising Output Edge
(1)
1187D–12/01