ATMEGA325-16AJ ATMEL [ATMEL Corporation], ATMEGA325-16AJ Datasheet - Page 172
ATMEGA325-16AJ
Manufacturer Part Number
ATMEGA325-16AJ
Description
8-bit Microcontroller with In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA325-16AJ.pdf
(347 pages)
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USART Baud Rate Registers –
UBRRnL and UBRRnH
172
ATmega325/3250/645/6450
• Bit 3 – USBSn: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver
ignores this setting.
Table 74. USBS Bit Settings
• Bit 2:1 – UCSZn1:0: Character Size
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data
bits (Character SiZe) in a frame the Receiver and Transmitter use.
Table 75. UCSZ Bits Settings
• Bit 0 – UCPOLn: Clock Polarity
This bit is used for synchronous mode only. Write this bit to zero when asynchronous
mode is used. The UCPOLn bit sets the relationship between data output change and
data input sample, and the synchronous clock (XCK).
Table 76. UCPOL Bit Settings
Bit
Read/Write
Initial Value
UCPOLn
UCSZn2
0
0
0
0
1
1
1
1
0
1
R/W
15
R
–
7
0
0
USBSn
0
1
R/W
Transmitted Data Changed
(Output of TxD Pin)
Rising XCK Edge
Falling XCK Edge
14
R
–
6
0
0
UCSZn1
R/W
13
0
0
1
1
0
0
1
1
R
–
5
0
0
R/W
12
R
–
4
0
0
UBRRn[7:0]
R/W
R/W
11
3
0
0
UCSZn0
0
1
0
1
0
1
0
1
R/W
R/W
10
UBRRn[11:8]
2
0
0
Received Data Sampled
(Input on RxD Pin)
Falling XCK Edge
Rising XCK Edge
Stop Bit(s)
1-bit
2-bit
R/W
R/W
9
1
0
0
Character Size
5-bit
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
R/W
R/W
8
0
0
0
2570A–AVR–09/04
UBRRnH
UBRRnL
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