DSPIC30F6010A MICROCHIP [Microchip Technology], DSPIC30F6010A Datasheet - Page 164

• Manufacturer Part Number: DSPIC30F6010A
• Description: High-Performance, 16-bit Digital Signal Controllers
• Manufacturer: MICROCHIP [Microchip Technology]

TABLE 21-7:
TABLE 21-8:
TABLE 21-9:
RCON
OSCCON 0742
OSCTUN 0744
PMD1
PMD2
Legend:
Note
RCON
OSCCON 0742
OSCTUN 0744
PMD1
PMD2
Legend:
Note
0xF80000
0xF80002
0xF80004
0xF80006
0xF80008
0xF8000A
0xF8000C
Legend:
Note
Name
Name
SFR
SFR
Address
1:
1:
1:
Addr. Bit 15
Addr. Bit 15
0740 TRAPR IOPUWR BGST
0770
0772 IC8MD
0740 TRAPR IOPUWR BGST
0770
0772 IC8MD
— = unimplemented bit, read as ‘0’
Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
— = unimplemented bit, read as ‘0’
Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
— = unimplemented bit, read as ‘0’
Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
FOSC
FWDT
FBORPOR
FBS
FSS
FGS
FICD
T5MD
T5MD
Name
—
—
—
—
SYSTEM INTEGRATION REGISTER MAP FOR dsPIC30F6010A DEVICES
SYSTEM INTEGRATION REGISTER MAP FOR dsPIC30F6015 DEVICES
DEVICE CONFIGURATION REGISTER MAP
IC7MD
IC7MD
Bit 14
T4MD
Bit 14
T4MD
—
—
FWDTEN
MCLREN
BKBUG
Bit 15
COSC<2:0>
COSC<2:0>
FCKSM<1:0>
—
—
—
IC6MD IC5MD IC4MD IC3MD
IC6MD IC5MD IC4MD IC3MD
Bit 13
T3MD
Bit 13
T3MD
—
—
Bit 14
COE
—
—
—
—
—
Bit 12
T2MD
Bit 12
T2MD
—
—
—
—
Bit 13
Bit 11
T1MD QEIMD PWMMD
Bit 11
T1MD QEIMD PWMMD
—
—
—
—
—
—
—
—
—
—
—
RBS<1:0>
RSS<1:0>
Bit 10
Bit 10
Bit 12
—
—
—
—
—
—
—
—
—
NOSC<2:0>
NOSC<2:0>
IC2MD
IC2MD
Bit 9
Bit 9
—
—
—
—
Bit 11
—
—
—
—
—
—
—
IC1MD OC8MD OC7MD
IC1MD OC8MD OC7MD
Bit 8
Bit 8
—
—
—
—
—
—
(1)
PWMPIN
Bit 10
—
—
—
—
—
I2CMD
I2CMD
EXTR
EXTR
Bit 7
Bit 7
—
—
POST<1:0>
POST<1:0>
FOS<2:0>
HPOL
Bit 9
—
—
—
—
U2MD
U2MD
Bit 6
SWR
Bit 6
SWR
ESS<1:0>
—
—
SWDTEN
SWDTEN
LPOL
Bit 8
OC6MD
OC6MD
EBS
U1MD
U1MD
LOCK
LOCK
—
—
—
Bit 5
Bit 5
BOREN
SPI2MD SPI1MD
OC5MD OC4MD OC3MD
SPI2MD SPI1MD
OC5MD OC4MD OC3MD
Bit 7
WDTO
WDTO
Bit 4
Bit 4
—
—
—
—
—
—
—
—
(1)
(1)
SLEEP
SLEEP
Bit 6
Bit 3
Bit 3
—
—
—
—
—
—
—
CF
CF
TUN<5:0>
TUN<5:0>
C2MD
Bit 5
Bit 2
IDLE
Bit 2
IDLE
FWPSA<1:0>
—
—
—
—
—
BORV<1:0>
—
—
—
LPOSCEN OSWEN Depends on Configuration bits.
LPOSCEN OSWEN Depends on Configuration bits.
OC2MD
OC2MD
Bit 4
C1MD
C1MD
Bit 1
BOR
Bit 1
BOR
—
—
—
—
Bit 3
ADCMD
OC1MD
ADCMD
OC1MD
—
—
—
Bit 0
POR
Bit 0
POR
FPR<4:0>
BSS<2:0>
SSS<2:0>
Depends on type of Reset.
Depends on type of Reset.
Bit 2
FWPSB<3:0>
—
—
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
GSS<1:0>
Reset State
Reset State
Bit 1
FPWRT<1:0>
ICS<1:0>
BWRP
SWRP
GWRP
Bit 0