DSPIC30F6010A MICROCHIP [Microchip Technology], DSPIC30F6010A Datasheet - Page 225

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DSPIC30F6010A

Manufacturer Part Number
DSPIC30F6010A
Description
High-Performance, 16-bit Digital Signal Controllers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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APPENDIX A:
Revision A (July 2005)
Original data sheet for dsPIC30F6010A/6015 devices.
Revision B (September 2006)
This revision reflects updates in these areas:
• Data Ram protection feature enables segments of
• BSRAM and SSRAM SFRs added to support
• Base Instruction CP1 removed (see
• Supported I
• Revised Electrical Characteristics:
• Added note to package drawings.
Revision C (January 2007)
This revision includes updates to the packaging
diagrams.
© 2011 Microchip Technology Inc.
RAM to be protected when used in conjunction
with Boot and Secure Code Segment Security
(see
ture”)
Data Ram Protection (see
- Operating current (I
- Idle current (I
- Power-down current (I
- I/O Pin input specifications (see
- BOR voltage limits (see
- Watchdog Timer time-out limits (see
Table
Table
Table
Table
Section 3.2.7 “Data Ram Protection Fea-
24-6)
24-7)
24-8)
24-21)
2
C Slave addresses (see
IDLE
) specifications (see
REVISION HISTORY
DD
) specifications (see
PD
Table
Table
) specifications (see
24-11)
3-3)
Table
Table
Table
24-9)
22-2)
17-2)
dsPIC30F6010A/6015
Revision D (March 2008)
This revision reflects these updates:
• Changed the location of the input reference in the
• Added FUSE Configuration Register (FICD)
• Removed erroneous statement regarding genera-
• Electrical Specifications:
• Additional minor corrections throughout the
10-bit High-Speed ADC Functional Block Diagram
(see
details (see
Registers”
tion of CAN receive errors (see
“Receive
- Resolved TBD values for parameters DO10,
- 10-bit High-Speed ADC t
- Parameter OS65 (Internal RC Accuracy) has
- Parameter DC12 (RAM Data Retention Volt-
- Parameter D134 (Erase/Write Cycle Time)
- Removed parameters OS62 (Internal FRC
- Parameter OS63 (Internal FRC Accuracy)
- Updated Min and Max values and Conditions
document
DO16, DO20, and DO26 (see
ter (time to stabilize) has been updated from
20 µs typical to 20 µs maximum (see
Table
been expanded to reflect multiple Min and
Max values for different temperatures (see
Table
age) Min and Max values have been updated
(see
has been updated to include Min and Max
values and the Typ value has been removed
(see
Jitter) and OS64 (Internal FRC Drift) and
Note 2 from AC Characteristics (see
Table
has been expanded to reflect multiple Min
and Max values for different temperatures
(see
for parameter SY11 and updated Min, Typ,
and Max values and Conditions for parame-
ter SY20 (see
Figure
Table
Table
Table
24-41)
24-19)
24-18)
Errors”)
Section 21.6 “Device Configuration
20-1)
and
24-5)
24-12)
24-18)
Table
Table
21-8)
24-21)
PDU
timing parame-
Section 19.4.5
Table
DS70150E-page 225
24-10)

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