MC9S08QD2MPS FREESCALE [Freescale Semiconductor, Inc], MC9S08QD2MPS Datasheet - Page 11
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MC9S08QD2MPS
Manufacturer Part Number
MC9S08QD2MPS
Description
8-Bit HCS08 Central Processor Unit (CPU)
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S08QD2MPS.pdf
(202 pages)
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6.2
6.3
6.4
7.1
7.2
7.3
7.4
7.5
8.1
8.2
8.3
Freescale Semiconductor
Pin Control — Pullup, Slew Rate and Drive Strength ....................................................................70
Pin Behavior in Stop Modes ............................................................................................................70
Parallel I/O Registers ......................................................................................................................71
Introduction .....................................................................................................................................75
Programmer’s Model and CPU Registers .......................................................................................76
Addressing Modes ...........................................................................................................................79
Special Operations ...........................................................................................................................81
HCS08 Instruction Set Summary ....................................................................................................84
Introduction .....................................................................................................................................95
External Signal Description ..........................................................................................................100
Register Definition ........................................................................................................................101
6.4.1 Port A Registers ................................................................................................................71
6.4.2 Port A Control Registers ...................................................................................................72
7.1.1 Features .............................................................................................................................75
7.2.1 Accumulator (A) ...............................................................................................................76
7.2.2 Index Register (H:X) ........................................................................................................76
7.2.3 Stack Pointer (SP) .............................................................................................................77
7.2.4 Program Counter (PC) ......................................................................................................77
7.2.5 Condition Code Register (CCR) .......................................................................................77
7.3.1 Inherent Addressing Mode (INH) .....................................................................................79
7.3.2 Relative Addressing Mode (REL) ....................................................................................79
7.3.3 Immediate Addressing Mode (IMM) ................................................................................79
7.3.4 Direct Addressing Mode (DIR) ........................................................................................79
7.3.5 Extended Addressing Mode (EXT) ..................................................................................80
7.3.6 Indexed Addressing Mode ................................................................................................80
7.4.1 Reset Sequence .................................................................................................................81
7.4.2 Interrupt Sequence ............................................................................................................81
7.4.3 Wait Mode Operation ........................................................................................................82
7.4.4 Stop Mode Operation ........................................................................................................82
7.4.5 BGND Instruction .............................................................................................................83
8.1.1 Module Configurations .....................................................................................................96
8.1.2 Features .............................................................................................................................99
8.1.3 Block Diagram ..................................................................................................................99
8.2.1 Analog Power (V
8.2.2 Analog Ground (V
8.2.3 Voltage Reference High (V
8.2.4 Voltage Reference Low (V
8.2.5 Analog Channel Inputs (ADx) ........................................................................................101
8.3.1 Status and Control Register 1 (ADCSC1) ......................................................................101
Analog-to-Digital Converter (ADC10V1)
Central Processor Unit (S08CPUV2)
DDAD
MC9S08QD4 Series MCU Data Sheet, Rev. 3
SSAD
) ..................................................................................................101
) .................................................................................................101
REFL
REFH
Chapter 7
Chapter 8
) ....................................................................................101
) ...................................................................................101
11
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