MC9S08QD2MPS FREESCALE [Freescale Semiconductor, Inc], MC9S08QD2MPS Datasheet - Page 25

• Manufacturer Part Number: MC9S08QD2MPS
• Description: 8-Bit HCS08 Central Processor Unit (CPU)
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

2.2.5.2
Slew rate control can be enabled for each port pin by setting the corresponding bit in one of the slew rate
control registers (PTxSEn). When enabled, slew control limits the rate at which an output can transition in
order to reduce EMC emissions. Slew rate control has no effect on pins that are configured as inputs.
2.2.5.3
An output pin can be selected to have high output drive strength by setting the corresponding bit in one of
the drive strength select registers (PTxDSn). When high drive is selected, a pin is capable of sourcing and
sinking greater current. Even though every I/O pin can be selected as high drive, the user must ensure that
the total current source and sink limits for the chip are not exceeded. Drive strength selection is intended
to affect the DC behavior of I/O pins. However, the AC behavior is also affected. High drive allows a pin
to drive a greater load with the same switching speed as a low drive enabled pin into a smaller load.
Because of this, the EMC emissions may be affected by enabling pins as high drive.
Freescale Semiconductor
1
2
3
4
PTA0
PTA1
PTA2
PTA3
PTA4
PTA5
See the module section listed for information on modules that share these pins.
Pin does not contain a clamp diode to V
pin when internal pullup is enabled may be as low as V
pulled to V
If both of these analog modules are enabled both will have access to the pin.
See
configuring the IRQ module.
Port Pins
2
Section 5.8, “Reset, Interrupt, and System Control Registers and Control
Output Slew Rate Control
Output Drive Strength Select
Lowest <- Pin Function Priority -> Highest
DD
.
KBI1P0
KBI1P1
KBI1P2
KBI1P3
TPM2CH0O
TPM2CH0I
Alternative
Function
MC9S08QD4 Series MCU Data Sheet, Rev. 3
TPM1CH0
TPM1CH1
TCLK1
TCLK2
BKGD/MS
IRQ
Alternative
Function
Table 2-1. Pin Sharing Priority
DD
and must not be driven above V
ADC1P0
ADC1P1
ADC1P2
ADC1P3
RESET
Alternative
Function
DD
3
3
3
3
– 0.7 V. The internal gates connected to this pin are
KBI1, ADC1, and TPM1 Chapters
KBI1, ADC1, and TPM1 Chapters
KBI1, ADC1, and TPM1 Chapters
KBI1, ADC1, and TPM2 Chapters
TPM2 Chapters
IRQ
4
, and TPM2 Chapters
DD
. The voltage measured on this
Bits,” for information on
Reference
Chapter 2 External Signal Description
1
25