MC9S08QD2MPS FREESCALE [Freescale Semiconductor, Inc], MC9S08QD2MPS Datasheet - Page 173
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MC9S08QD2MPS
Manufacturer Part Number
MC9S08QD2MPS
Description
8-Bit HCS08 Central Processor Unit (CPU)
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S08QD2MPS.pdf
(202 pages)
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1
Freescale Semiconductor
Reset
BDFR is writable only through serial background mode debug commands, not from user programs.
BDFR
Field
W
0
R
Background Debug Force Reset — A serial active background mode command such as WRITE_BYTE allows
an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot
be written from a user program.
0
0
7
Figure 12-6. System Background Debug Force Reset Register (SBDFR)
= Unimplemented or Reserved
0
0
6
Table 12-3. SBDFR Register Field Description
MC9S08QD4 Series MCU Data Sheet, Rev. 3
0
0
5
0
0
4
Description
0
0
3
2
0
0
0
0
1
Development Support
BDFR
0
0
0
1
173
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