MC9S08QD2MPS FREESCALE [Freescale Semiconductor, Inc], MC9S08QD2MPS Datasheet - Page 97

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MC9S08QD2MPS

Manufacturer Part Number
MC9S08QD2MPS
Description
8-Bit HCS08 Central Processor Unit (CPU)
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
8.1.1.1
The ADC channel assignments for the MC9S08QD4 series devices are shown in
channels convert to an unknown value.
1
2
8.1.1.2
The ADC is capable of performing conversions using the MCU bus clock, the bus clock divided by two,
or the local asynchronous clock (ADACK) within the module. The alternate clock, ALTCLK, input for the
MC9S08QD4 series MCU devices is not implemented.
8.1.1.3
The ADC hardware trigger, ADHWT, is output from the real-time interrupt (RTI) counter. The RTI counter
can be clocked by either ICSERCLK or a nominal 32 kHz clock source within the RTI block.
The period of the RTI is determined by the input clock frequency and the RTIS bits. The RTI counter is a
free running counter that generates an overflow at the RTI rate determined by the RTIS bits. When the
ADC hardware trigger is enabled, a conversion is initiated upon a RTI counter overflow.
Freescale Semiconductor
ADCH
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
For information, see
Requires BGBE =1 in SPMSC1 see
For value of bandgap voltage reference see
Channel
AD10
AD11
AD12
AD13
AD14
AD15
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
Channel Assignments
Alternate Clock
Hardware Trigger
Section 8.1.1.5, “Temperature
PTA0/ADC1P0
PTA1/ADC1P1
PTA2/ADC1P2
PTA3/ADC1P3
Input
V
V
V
V
V
V
V
V
Vss
Vss
Vss
Vss
SS
SS
SS
SS
SS
SS
SS
SS
Section 5.8.8, “System Power Management Status and Control 1 Register
MC9S08QD4 Series MCU Data Sheet, Rev. 3
Table 8-1. ADC Channel Assignment
Appendix A.5, “DC
Pin Control
ADPC0
ADPC1
ADPC2
ADPC3
Sensor.”
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Characteristics.”
ADCH
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
Chapter 8 Analog-to-Digital Converter (ADC10V1)
Channel
Disabled
Module
V
V
V
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
REFH
REFH
REFL
Internal Bandgap
Temperature
Reserved
Reserved
Reserved
Reserved
Sensor
Table 8-1
Input
None
V
V
V
V
V
V
V
V
V
DD
DD
SS
SS
SS
SS
SS
SS
SS
1
.
2
Reserved
(SPMSC1).”
Pin Control
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
97

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