MC9S08QD2MPS FREESCALE [Freescale Semiconductor, Inc], MC9S08QD2MPS Datasheet - Page 49

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MC9S08QD2MPS

Manufacturer Part Number
MC9S08QD2MPS
Description
8-Bit HCS08 Central Processor Unit (CPU)
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1
4.7.3
4.7.4
During reset, the contents of the nonvolatile location NVPROT is copied from flash into FPROT. This
register can be read at any time, but user program writes have no meaning or effect.
Freescale Semiconductor
Background commands can be used to change the contents of these bits in FPROT.
KEYACC
Reset
Reset
FPDIS
Field
Field
FPS
7:1
5
0
W
W
R
R
Flash Configuration Register (FCNFG)
Flash Protection Register (FPROT and NVPROT)
Enable Writing of Access Key — This bit enables writing of the backdoor comparison key. For more detailed
information about the backdoor key mechanism, refer to
0 Writes to 0xFFB0–0xFFB7 are interpreted as the start of a flash programming or erase command.
1 Writes to NVBACKKEY (0xFFB0–0xFFB7) are interpreted as comparison key writes.
Flash Protect Select Bits — When FPDIS = 0, this 7-bit field determines the ending address of unprotected
flash locations at the high address end of the flash. Protected flash locations cannot be erased or programmed.
Flash Protection Disable
0 Flash block specified by FPS7:FPS1 is block protected (program and erase not allowed).
1 No flash block is protected.
0
0
7
7
= Unimplemented or Reserved
0
0
6
6
This register is loaded from nonvolatile location NVPROT during reset.
Figure 4-7. Flash Configuration Register (FCNFG)
Table 4-10. FCNFG Register Field Descriptions
Table 4-11. FPROT Register Field Descriptions
Figure 4-8. Flash Protection Register (FPROT)
MC9S08QD4 Series MCU Data Sheet, Rev. 3
KEYACC
0
5
5
FPS
0
0
4
4
(1)
Description
Description
Section 4.6,
3
0
0
3
Chapter 4 Memory Map and Register Definition
“Security.”
0
0
2
2
0
0
1
1
FPDIS
0
0
0
0
(1)
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