A3PE1500-1FG896 ACTEL [Actel Corporation], A3PE1500-1FG896 Datasheet - Page 60
A3PE1500-1FG896
Manufacturer Part Number
A3PE1500-1FG896
Description
ProASIC3E Flash Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.A3PE1500-1FG896.pdf
(152 pages)
- Current page: 60 of 152
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ProASIC3E DC and Switching Characteristics
Table 2-76 • LVDS
Figure 2-22 • B-LVDS/M-LVDS Multipoint Application Using LVDS I/O Buffers
2 -4 8
Speed Grade
–F
Std.
–1
–2
Note:
R
T
Z
Z
Z
0
0
stub
For specific junction temperature and voltage supply levels, refer to
values.
Receiver
+
R
R
S
Timing Characteristics
B-LVDS/M-LVDS
Bus LVDS (B-LVDS) and Multipoint LVDS (M-LVDS) specifications extend the existing LVDS standard
to high-performance multipoint bus applications. Multidrop and multipoint bus configurations
may contain any combination of drivers, receivers, and transceivers. Actel LVDS drivers provide the
higher drive current required by B-LVDS and M-LVDS to accommodate the loading. The drivers
require series terminations for better signal quality and to control voltage swing. Termination is
also required at both ends of the bus since the driver can be located anywhere on the bus. These
configurations can be implemented using the TRIBUF_LVDS and BIBUF_LVDS macros along with
appropriate terminations. Multipoint designs using Actel LVDS macros can achieve up to 200 MHz
with a maximum of 20 loads. A sample application is given in
buffer delays are available in the LVDS section in
Example: For a bus consisting of 20 equidistant loads, the following terminations provide the
required differential voltage, in worst-case Industrial operating conditions, at the farthest receiver:
R
Commercial-Case Conditions: T
-
S
EN
R
Z
= 60 Ω and R
S
stub
Z
Z
Z
0
0
stub
Transceiver
+
T
R
T
= 70 Ω, given Z
S
-
EN
R
Z
S
stub
Z
Z
Z
0
0
t
stub
0.79
0.56
0.49
DOUT
0.66
J
0
Driver
+
= 70°C, Worst-Case V
= 50 Ω (2") and Z
R
D
S
-
EN
R
Z
S
stub
v1.2
2.25
1.87
1.59
1.40
Z
Z
t
Z
0
0
DP
stub
Table
Receiver
+
stub
R
R
S
CC
-
= 50 Ω (~1.5").
2-76.
EN
R
Z
S
= 1.425 V, Worst-Case V
stub
0.05
0.04
0.04
0.03
t
DIN
...
Table 2-6 on page 2-5
Figure
Z
Z
2-22. The input and output
0
0
2.18
1.82
1.55
1.36
Transceiver
t
PY
+
R
T
S
-
CCI
EN
R
S
= 2.3 V
for derating
BIBUF_LVDS
Units
Z
Z
ns
ns
ns
ns
0
0
R
T
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