A3PE1500-1FG896 ACTEL [Actel Corporation], A3PE1500-1FG896 Datasheet - Page 95

• Manufacturer Part Number: A3PE1500-1FG896
• Description: ProASIC3E Flash Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

Part Number and Revision Date
List of Changes
Previous Version
v1.1
(January 2008)
v1.0
(January 2008)
v2.1
(July 2007)
v2.0
(April 2007)
Advance v0.6
(January 2007)
Part Number 51700098-002-2
Revised June 2008
The following table lists critical changes that were made in the current version of the chapter.
The title of
remove "as measured on quiet I/Os." Table note 2 was revised to remove
"estimated SSO density over cycles." Table note 3 was deleted
Table 2-74 · LVDS Minimum and Maximum DC Input and Output Levels
updated.
In
Temperature1, Maximum Operating Junction Temperature was changed from
110°C to 100°C for both commercial and industrial grades.
The
In the
FCLKIN is the input clock frequency.
In
was incorrect. It previously said T
In
1 are new.
Table 2-99 · JTAG 1532
in the previous version of the document.
This document was previously in datasheet v2.1. As a result of moving to the
handbook format, Actel has restarted the version numbers so the new version
number is v1.0.
The caption "Main (chip)" in Figure 2-9 • Overview of Automotive ProASIC3
VersaNet Global Network was changed to "Chip (main)."
The T
changed to T
The "PLL Macro" section was updated to add information on the VCO and PLL
outputs during power-up.
The "PLL Macro" section was updated to include power-up information.
Table 2-13 • ProASIC3E CCC/PLL Specification was updated.
Figure 2-19 • Peak-to-Peak Jitter Definition is new.
The "SRAM and FIFO" section was updated with operation and timing
requirement information.
The "RESET" section was updated with read and write information.
The "RESET" section was updated with read and write information.
The "Introduction" in the "Advanced I/Os" section was updated to include
information on input and output buffers being disabled.
In the Table 2-15 • Levels of Hot-Swap Support, the ProASIC3 compliance
descriptions were updated for levels 3 and 4.
Table 2-14 · Summary of Maximum and Minimum DC Input
Table 2-94 · ProASIC3E CCC/PLL
Table 2-3 · Flash Programming Limits – Retention, Storage and Operating
"PLL Behavior at Brownout Condition" section
J
"PLL Contribution—PPLL"
parameter in Table 3-2 • Recommended Operating Conditions was
Table 2-4 · Overshoot and Undershoot Limits 1
A
, ambient temperature, and table notes 4–6 were added.
Changes in Current Version (v1.2)
was populated with the parameter data, which was not
v1.2
section, the following was deleted:
J
Specification, the SCLK parameter and note
and it was corrected and changed to T
ProASIC3E DC and Switching Characteristics
is new.
was modified to
.
Levels, the note
A
.
was
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