HV51V7403HGL-5 Hynix Semiconductor, HV51V7403HGL-5 Datasheet - Page 5

• Manufacturer Part Number: HV51V7403HGL-5
• Description: 4M x 4Bit EDO DRAM
• Manufacturer: Hynix Semiconductor

CAPACITANCE
Note : 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
AC CHARACTERISTICS
Read, Write, Read-modify-Write and Refresh Cycle
Test Condition
•
•
•
Output capacitance (Data-in, Data-out)
Rev.0.1/Apr.01
Input rise and fall times = 2ns
Input levels : V
Input timing reference level : V
/RAS to Column address delay time
2. /CAS = V
Input capacitance (Address)
Random read or write cycle time
Input capacitance (Clocks)
/CAS to /RAS precharge time
Column address set-up time
Column address hold time
Row address set-up time
/RAS to /CAS delay time
Row address hold time
/RAS precharge time
/CAS precharge time
/RAS pulse width
/CAS pulse width
Parameter
/RAS hold time
/CAS hold time
Parameter
IH
IL
to disable D
=0V, V
(Vcc=3.3V +/-10%, TA=25 C)
IH
=3V
out
(Vcc=3.3V +/-10%, TA=0~70C, Note 1, 2, 18)
IL
/V
IH
= 0.8/2.0V
Symbol
Symbol
CI/O
CI1
CI2
t
t
t
t
t
t
t
t
t
t
t
t
RAH
CAH
RCD
RAD
RSH
CSH
CRP
t
t
RAS
CAS
ASR
ASC
RC
RP
CP
Min
84
30
50
12
10
10
35
8
8
0
8
0
8
5
•
•
-50
Min.
10,000
10,000
-
-
-
Max
Output timing reference level :
V
Output load : 1 TTL gate + C
37
25
-
-
-
-
-
-
-
-
-
-
OL
/V
OH
Min
104
40
10
60
10
10
10
14
12
13
40
=0.8/0.2V
0
0
5
HY51V(S)17403HG/HGL
-60
( including scope and jig )
Max
10,000
10,000
5
7
7
Max
45
30
-
-
-
-
-
-
-
-
-
-
Min
124
50
13
70
13
10
13
14
12
13
45
0
0
5
-70
Unit
L
pF
pF
pF
10,000
10,000
Max
(100pF)
52
35
-
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1, 2
1
1
Note
3
4
5