LRS1341 Sharp, LRS1341 Datasheet
LRS1341
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LRS1341 Summary of contents
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... Operating current (MAX.): – – – Standby current: 45 µA (MAX.) – Data retention current: 35 µA (MAX DESCRIPTION The LRS1341/LRS1342 is a combination memory organized as 1,048,576 × 16-bit flash memory and 131,072 × 16-bit static RAM in one package ...
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... LRS1341/LRS1342 F-A F F-CE F-OE F-WE F-RP F-WP S-CE S-CE S-OE S-WE S-UB Figure 2. LRS1341/LRS1342 Block Diagram 2 F-V F 16M (x16) BIT FLASH MEMORY (x16) BIT SRAM S-LB S-V CC Stacked Chip (16M Flash & 2M SRAM) F-RY/BY GND LRS1342-2 Data Sheet ...
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... Table 1. Pin Descriptions DESCRIPTION (with F- PPLK < PPLK LRS1341/LRS1342 TYPE Input Input Input Input Input Input Input Input Input Input Input Input HH Output Input/Output Power Power Power Power — — 3 ...
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... LRS1341/LRS1342 FLASH SRAM F-CE F-RP Read Standby L Output Disable Standby L Write Standby L Read H H Output Standby Disable H Write H Read X X Output Reset/Power Down Disable X Write X Standby Standby H Reset/Power Down Standby X NOTES Refer to DC Characteristics Refer to the ‘Flash Memory Command Definition’ section for valid D during a write operation ...
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... Okay PP SR.2 = Word Write Suspend Status (WWSS Word Write Suspended 0 = Word Write in Progress/Completed SR.1 = Device Protect Status (DPS F-WP and/or F-RP Lock Detected, Operation Abort 0 = Unlock SR.0 = Reserved for future enhancements (R) Data Sheet Table 4. Identifier Codes ADDRESS LRS1341 DATA ( ( 00000H B0H 00001H 48H Table 5 ...
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... LRS1341/LRS1342 MEMORY MAPS [ FFFFF 32K-WORD MAIN BLOCK F8000 F7FFF 32K-WORD MAIN BLOCK F0000 EFFFF 32K-WORD MAIN BLOCK E8000 E7FFF 32K-WORD MAIN BLOCK E0000 DFFFF 32K-WORD MAIN BLOCK D8000 D7FFF 32K-WORD MAIN BLOCK D0000 CFFFF 32K-WORD MAIN BLOCK C8000 C7FFF ...
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... RATINGS -0 -25 to +85 OPR -55 to +125 STG -0.2 to +14.0 PP -0.5 to +14.0 TYP. MAX. 3.0 3 0.2 CC 0.6 12.6 . CONDITION MIN. TYP I/O LRS1341/LRS1342 UNIT NOTES °C ° UNIT NOTES MAX. UNIT ...
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... LRS1341/LRS1342 DC CHARACTERISTICS T = -25° 85° PARAMETER Input leakage current Output leakage current Standby Current Deep Power-Down Current Read Current F-V CC Word Write Current Block Erase Current Word Write Block Erase Suspend Current Standby or Read Current Deep Power-Down Current ...
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... 1.35 V 1TTL + C (30 pF) L SYMBOL t AVAV t AVQV t ELQV t PHQV t GLQV t ELQX t EHQZ t GLQX t GHQZ after the falling edge of F-CE without impact on t GLQV LRS1341/LRS1342 MIN. MAX. UNIT 100 ns 100 ns 100 ns 10 µ ELQV 9 ...
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... LRS1341/LRS1342 Write Cycle (F-WE Controlled -25°C to +85° PARAMETER Write Cycle Time F-RP HIGH Recovery to F-WE going to LOW F-CE Setup to F-WE going LOW F-WE Pulse Width F-RP V Setup to F-WE going HIGH HH F-WP V Setup to F-WE going HIGH IH F-V Setup to F-WE going HIGH PP Address Setup to F-WE going HIGH 2 Data Setup to F-WE going HIGH ...
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... QVVL t 0 QVPH t 0 QVSL and D for block erase or word write 2 3 MIN. TYP. MAX 1.8 0.3 1.2 0.5 7.5 8.6 19.3 23 LRS1341/LRS1342 MAX. UNIT ns µ 100 11 12 UNIT NOTES 1 MIN. TYP. MAX. ...
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... LRS1341/LRS1342 FLASH MEMORY AC CHARACTERISTICS TIMING DIAGRAMS Standby ADDRESS F-CE F-OE F-WE HIGH Z DQ F-V CC F-RP 12 Device Address Selection Address Stable t AVAV t GLQV t ELQV t GLQX t ELQX Valid Output t AVQV t PHQV Figure 5. Read Cycle Timing Diagram Stacked Chip (16M Flash & 2M SRAM) Data Valid t EHQZ t GHQZ t OH ...
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... Figure 6. Write Cycle Timing Diagram (F-WE Controlled) Data Sheet AVAV AVWH WHAX t WHWL t t DVWH WHGL t WHEH t t WHDX WHQV1 EHRL t SHWH t PHHWH t VPWH LRS1341/LRS1342 5 6 Data Valid SRD QVSL t QVPH t QVVL LRS1342-5 13 ...
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... LRS1341/LRS1342 1 A ADDRESS t F-WE t WLEL F-OE F-CE t HIGH PHWL F-RY/ PPH F PPLK V IL NOTES power-up and standby Write block erase or word write setup. 3. Write block erase confirm or valid address and data. 4. Automated erase or program delay. 5. Read status register data. ...
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... Figure 8. AC Waveform for Reset Operation Data Sheet SYMBOL MIN. , this CC t 100 PLPH t PLRZ t 100 VPH has been CC t PLPH A. Reset During Read Array Mode t PLRZ t PLPH B. Reset During Block Erase or Word Write t VPH C. F-RP Rising Timing LRS1341/LRS1342 MAX. UNIT NOTES ns 23.6 µ LRS1342-7 15 ...
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... LRS1341/LRS1342 SRAM AC ELECTRICAL CHARACTERISTICS AC Test Conditions PARAMETER Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Level Output Load* NOTE: *Including scope and jig capacitance. Read Cycle T = -25°C to +85° PARAMETER Read Cycle Time ...
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... Stacked Chip (16M Flash & 2M SRAM) SRAM AC CHARACTERISTICS TIMING DIAGRAMS ADDRESS S-CE 1 S-CE 2 S-UB, S-LB S-OE D OUT NOTE: S-WE is HIGH for Read Cycle. Data Sheet ACE1 BLZ OLZ Figure 9. Read Cycle Timing Diagram LRS1341/LRS1342 BHZ t OHZ Data Valid t OH LRS1342-8 17 ...
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... LRS1341/LRS1342 ADDRESS S-CE 1 S-CE 2 S-UB, S-LB S-WE D OUT D IN NOTES write occurs during the overlap of a LOW S-CE A write begins at the latest transition among S-CE and S-WE going LOW. A write ends at the earliest transition among S-CE S-CE going LOW and S-WE going HIGH write to the end of write measured from the later of S- write ...
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... BW (NOTE (NOTE 7) HIGH IMPEDANCE (NOTE HIGH S-CE and a LOW S-WE going LOW, S-CE going HIGH 1 2 going HIGH measured from the beginning of WP going LOW or S-CE going HIGH to the end 1 2 LRS1341/LRS1342 (NOTE Data Valid LRS1342-10 19 ...
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... LRS1341/LRS1342 ADDRESS S-CE 1 S-CE 2 S-UB, S-LB S-WE D OUT D IN NOTES write occurs during the overlap of a LOW S-CE A write begins at the latest transition among S-CE and S-WE going LOW. A write ends at the earliest transition among S-CE S-CE going LOW and S-WE going HIGH write to the end of write measured from the later of S- write ...
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... V 1 CCDR CDR t R ≤ 0.2 V (S-CE controlled Data Retention Mode t CDR ≥ V S- CCDR , fix the input level of S-CE between 1 2 Data Retention Mode t CDR ≤ 0.2 V S-CE 2 LRS1341/LRS1342 1 MIN. TYP. MAX. UNIT 2.0 3 µ controlled Controlled Controlled) 2 NOTES 2 2 ...
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... LRS1341/LRS1342 GENERAL DESIGN GUIDELINES Supply Power Maximum difference (between F-V the voltage is less than 0.3 V. Power Supply and Chip Enable of Flash Memory and SRAM S-CE should not be LOW and S-CE 1 HIGH when F-CE is LOW simultaneously. If the two memories are active together, they may not operate normally because of interference noises or data collision on DQ bus ...
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... SIDE VIEW 0.10 S 1.1 TYP. 0.8 TYP. H BOTTOM VIEW NOTE: Dimensions are in mm. Data Sheet INDEX +0.2 11 (See Detail) 0.4 TYP. C 1.2 TYP. 0.8 TYP φ 0. φ 0.45 ±0.05 φ 0. LRS1341/LRS1342 0.40 TYP. DETAIL 0.35 ±0.05 0.4 TYP 1.4 MAX. 72FBGA 23 ...
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... LRS1341/LRS1342 LIFE SUPPORT POLICY SHARP components should not be used in medical devices with life support functions or in safety equipment (or similiar applications where component failure would result in loss of life or physical harm) without the written approval of an officer of the SHARP Corporation. LIMITED WARRANTY SHARP warrants to its Customer that the Products will be free from defects in material and workmanship under normal use and service for a period of one year from the date of invoice ...