LRS1341 Sharp, LRS1341 Datasheet - Page 8

• Manufacturer Part Number: LRS1341
• Description: Stacked Chip 16M Flash Memory and 2M SRAM
• Manufacturer: Sharp

LRS1341/LRS1342
DC CHARACTERISTICS
NOTES:
1. Reference values at V
2. Includes F-RY/BY.
3. Automatic Power Savings (APS) for Flash Memory reduces typi-
4. CMOS inputs are either V
8
Input leakage current
Output leakage current
F-V
F-V
S-V
Input LOW Voltage
Input HIGH Voltage
Output LOW Voltage
Output HIGH Voltage (CMOS)
F-V
F-V
Operations
F-V
F-RP Unlock Voltage
T
cal I
are either V
CC
PP
PP
PP
CC
CC
A
= -25°C to + 85°C, V
Lockout during Normal Operations
Word Write or Block Erase
CCR
Lockout Voltage
Standby Current
Deep Power-Down Current
Read Current
Word Write Current
Block Erase Current
Word Write Block Erase
Suspend Current
Standby or Read Current
Deep Power-Down Current
Word Write Current
Block Erase Current
Word Write or Block Erase
Suspend Current
Standby Current
Operation Current
to 3 mA at 2.7 V
PARAMETER
IL
or V
IH
.
CC
CC
= 3.0 V and T
CC
in static operation.
± 0.2 V or GND ± 0.2 V. TTL inputs
CC
= 2.7 V to 3.6 V
A
= +25°C.
SYMBOL
I
I
V
V
V
I
I
I
V
V
CCWS
I
PPWS
I
I
I
I
CCES
I
I
I
I
I
I
PPES
I
V
V
CCW
CCD
CCR
PPW
V
I
CCS
CCE
PPS
PPR
PPD
PPE
I
CC1
CC2
V
PPLK
PPH1
PPH2
SB1
OH1
I
LKO
LO
SB
LI
OL
HH
IH
IL
V
V
F-CE = F-RP = F-V
F-WP = F-V
or F-GND ± 0.2 V
F-CE = F-RP = V
F-RP = F-GND ± 0.2 V,
I
CMOS input, F-CE = F-GND,
f = 5 MHz, I
TTL input, F-CE = F-GND,
f = 5 MHz, I
F-V
F-V
F-V
F-V
F-CE = V
F-V
F-V
F-RP = F-GND ± 0.2 V
F-V
F-V
F-V
F-V
F-V
S-CE
or S-CE
S-CE
S-CE
V
S-CE
V
t
I
I
Unavailable F-WP
OUT
CYCLE
OL
OH
IN
OUT
IH
IN
, t
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
= 0.5 mA
= V
= S-V
= -0.5 mA
(F-RY/BY) = 0 mA
CYCLE
1
1
1
1
= V
, S-CE
= 2.7 V to 3.6 V
= 11.4 V to 12.6 V
= 2.7 V to 3.6 V
= 11.4 V to 12.6 V
= F-V
> F-V
= 2.7 V to 3.6 V
= 11.4 V to 12.6 V
= 2.7 V to 3.6 V
= 11.4 V to 12.6 V
= V
= V
= 0.2 V, S-CE
= V
= 1 µs, I
CC
2
IH
CC
≤ 0.2 V
CC
PPH
IL
IH
or GND
OUT
OUT
, S-CE
= MIN., I
CC
CC
CC
CONDITION
or GND
or S-CE
- 0.2 V, or 0.2 V
2
≥ S-V
± 0.2 V
I/O
= 0 mA
= 0 mA
IH,
2
= 0 mA
5. Block erases and word writes are inhibited when F-V
6. F-RP connection to a V
CC
= V
F-WP = V
CC
I/O
2
2
not guaranteed in the range between V
(MIN.), and above V
lative period of 80 hours.
= S-V
± 0.2 V
= V
IH
- 0.2 V
= 0 mA
, V
IL
CC
IN
IH
= V
- 0.2 V,
or V
IL
Stacked Chip (16M Flash & 2M SRAM)
or
IL
MIN.
11.4
11.4
PPH
-1.5
-1.5
-0.2
2.2
2.2
2.7
1.5
HH
(MAX.).
supply is allowed for a maximum cumu-
TYP.
0.2
0.1
25
±2
10
12
10
5
8
1
V
CC
MAX.
+1.5
+1.5
12.6
12.6
±15
200
200
0.6
0.4
1.5
3.6
50
10
25
30
17
12
17
12
40
30
25
20
45
45
2
6
5
3
8
PPLK
+ 0.2
(MAX.) and V
UNIT
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
µA
µA
µA
Data Sheet
V
V
V
V
V
V
V
V
V
PP
≤V
PPLK
NOTES
3, 4
3, 4
2
2
2
5
6
PPH
and