LRS1341 Sharp, LRS1341 Datasheet - Page 3
![no-image](/images/manufacturer_photos/0/6/601/sharp_sml.jpg)
LRS1341
Manufacturer Part Number
LRS1341
Description
Stacked Chip 16M Flash Memory and 2M SRAM
Manufacturer
Sharp
Datasheet
1.LRS1341.pdf
(24 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Stacked Chip (16M Flash & 2M SRAM)
Data Sheet
F-A
S-CE
DQ
A
F-RY/BY
T
17
F-V
S-V
0
0
F-V
F-WE
S-WE
F-WP
F-OE
S-OE
S-UB
F-CE
F-RP
1
S-LB
GND
PIN
1
NC
to A
to DQ
to F-A
to T
, S-CE
CC
CC
PP
16
5
15
19
2
Address Inputs (Common)
Address Inputs (Flash)
Chip Enable Input (Flash)
Chip Enable Inputs (SRAM)
Write Enable Input (Flash)
Write Enable Input (SRAM)
Output Enable Input (Flash)
Output Enable Input (SRAM)
SRAM Byte Enable Input (DQ
SRAM Byte Enable Input (DQ
Reset/Power Down (Flash)
Write Protect (Flash)
Ready/Busy (Flash)
Data Input/Outputs (Common)
Power Supply (Flash)
Power Supply (SRAM)
Write, Erase Power Supply (Flash)
Ground (Common)
No Connection
Test Pins (Should be Open)
Block erase and Word Write: V
Read: V
Reset/Power Down: V
Two Boot Blocks Locked: V
Erase of Write can operate to all blocks)
During an Erase or Write operation: V
Block Erase and Word Write Suspend: HIGH-Z
Deep Power Down: V
Block Erase and Word Write: F-V
All Blocks Locked: F-V
IH
Table 1. Pin Descriptions
or V
HH
DESCRIPTION
OH
IL
PP
< V
0
8
IL
to DQ
to DQ
PPLK
(with F-RP = V
IH
or V
PP
7
15
)
= V
)
HH
OL
PPLK
HH
Input/Output
Output
Power
Power
Power
Power
TYPE
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
—
—
LRS1341/LRS1342
3