LRS1341 Sharp, LRS1341 Datasheet - Page 16

• Manufacturer Part Number: LRS1341
• Description: Stacked Chip 16M Flash Memory and 2M SRAM
• Manufacturer: Sharp

LRS1341/LRS1342
SRAM AC ELECTRICAL CHARACTERISTICS
AC Test Conditions
NOTE: *Including scope and jig capacitance.
Read Cycle
NOTE: *Active output to HIGH impedance and HIGH impedance to output active
tests specified for a ±200 mV transition from steady state levels into the test load.
Write Cycle
NOTE: *Active output to HIGH impedance and HIGH impedance to output active
tests specified for a ±200 mV transition from steady state levels into the test load.
16
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Level
Output Load*
Read Cycle Time
Address Access Time
Chip Enable Access Time
Byte Enable Access Time
Output Enable to Output Valid
Output hold from address change
S-CE
S-OE LOW to Output Active*
S-UB or S-LB LOW to Output in HIGH Impedance*
S-CE
S-OE HIGH to Output in HIGH Impedance*
S-UB or S-LB HIGH to Output in HIGH Impedance*
Write Cycle Time
Chip Enable to End of Write
Address Valid to End of Write
Byte Enable to End of Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Input Data Setup Time
Input Data Hold Time
S-WE HIGH to Output Active*
S-WE LOW to Output in HIGH Impedance*
T
T
A
A
1
1
= -25°C to +85°C, V
= -25°C to +85°C, V
, S-CE
, S-CE
2
2
PARAMETER
PARAMETER
HIGH to Output in HIGH Impedance*
LOW to Output Active*
PARAMETER
CC
CC
= 2.7 V to 3.6 V
= 2.7 V to 3.6 V
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
WC
CW
AW
BW
WP
WR
DW
OW
1TTL + C
DH
WZ
AS
0.4 V to 2.7 V
CONDITION
S-CE
S-CE
S-CE
S-CE
S-CE
S-CE
1.5 V
5 ns
L
1
2
1
2
1
2
(30 pF)
MIN.
85
75
75
75
65
35
0
0
0
5
0
SYMBOL
t
t
t
ACE1
ACE2
t
t
t
t
t
t
t
t
t
t
t
t
OHZ
OLZ
HZ1
HZ2
BHZ
LZ1
LZ2
BLZ
RC
OE
OH
AA
BE
MAX.
25
Stacked Chip (16M Flash & 2M SRAM)
MIN.
85
10
10
10
10
10
0
0
0
0
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MAX.
85
85
85
85
45
25
25
25
25
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Data Sheet