HYS64V16300GU Infineon, HYS64V16300GU Datasheet - Page 8
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HYS64V16300GU
Manufacturer Part Number
HYS64V16300GU
Description
3.3 V 16M x 64/72-Bit 1 Bank 128MByte SDRAM Module 3.3 V 32M x 64/72-Bit 2 Bank 256MByte SDRAM Module 168-Pin Unbuffered DIMM Modules
Manufacturer
Infineon
Datasheet
1.HYS64V16300GU.pdf
(20 pages)
INFINEON Technologies
Operating Currents per SDRAM Component
T
Operating Current
t
Outputs open, Burst Length = 4, CL = 3
All banks operated in random access,
all banks operated in ping-pong manner
to maximize gapless data access
Precharge Standby Current
in Power Down Mode
CS =
Precharge Stand-by Current
in Non-Power Down Mode
CS =
No Operating Current
t
active state (max. 4 banks)
Burst Operating Current
t
Read command cycling
Auto-Refresh Current
t
Auto-Refresh command cycling
Self-Refresh Current
Self-Refresh Mode, CKE = 0.2 V
RC
CK
CK
CK
Parameter
1. These parameters depend on the cycle rate. These values are measured at 133 MHz for -7 and 7.5 modules
2. These parameters are measured with continuous data stream during read access and all DQ toggling. CL = 3
A
= 0 to 70
= min., CS =
= min.,
= min.,
=
and at 100 Mhz for -8 modules. Input signals are changed once during t
currents when t
and BL = 4 assumed and the data-out current is excluded
t
V
V
RCMIN.
IH
IH (MIN.)
(min.), CKE
,
o
t
C,
, CKE
CK
V
=
V
CK
DD
IH(MIN)
t
CKMIN.
= infinity. All values are shown per memory component.
= 3.3 V 0.3 V
V
IH(MIN)
V
,
IL(MAX)
Test
Condition
–
t
t
CKE
CKE
–
–
–
CK
CK
= min.
= min.
8
V
V
IH(MIN.)
IL(MAX.)
Symbol
I
I
I
I
I
I
I
I
CC1
CC2P
CC2N
CC3N
CC3P
CC4
CC5
CC6
HYS 64/72V16300/32220GU
CK
-7 /7.5 -8
160
1.5
40
50
10
100
230
1.5
, except for I
max.
SDRAM-Modules
150
1.5
35
45
10
90
210
1.5
CC6
and for standby
Unit Note
mA
mA
mA
mA
mA
mA
mA
mA
1)
1)
1)
1)
1)
1), 2)
1)
1)
9.01