EVAL-AD1928EB AD [Analog Devices], EVAL-AD1928EB Datasheet - Page 27

no-image

EVAL-AD1928EB

Manufacturer Part Number
EVAL-AD1928EB
Description
2 ADC/8 DAC with PLL, 192 kHz, 24-Bit Codec
Manufacturer
AD [Analog Devices]
Datasheet
ADC CONTROL REGISTERS
Table 23. ADC Control 0 Register
Bit
0
1
2
3
4
5
7:6
Table 24. ADC Control 1 Register
Bit
1:0
4:2
6:5
7
Value
0
1
0
1
0
0
0
1
0
1
00
01
10
11
Value
00
01
10
11
000
001
010
011
100
101
110
111
00
01
10
11
0
1
32 kHz/44.1 kHz/48 kHz
Stereo
Function
Normal operation
Power down
Off
On
Reserved
Reserved
Unmute
Mute
Unmute
Mute
64 kHz/88.2 kHz/96 kHz
128 kHz/176.4 kHz/192 kHz
Reserved
Function
24
20
Reserved
16
1
0
8
12
16
Reserved
Reserved
Reserved
TDM (daisy chain)
ADC AUX mode (ADC-, DAC-, TDM-coupled)
Reserved
Latch in midcycle (normal)
Latch in at end of cycle (pipeline)
Rev. 0 | Page 27 of 32
Description
Power-down
High-pass filter
ADC 1L mute
ADC 1R mute
Output sample rate
Description
Word width
SDATA delay (BCLK periods)
Serial format
BCLK active edge (TDM in)
AD1928

Related parts for EVAL-AD1928EB