EVAL-ADE7816EBZ AD [Analog Devices], EVAL-ADE7816EBZ Datasheet
EVAL-ADE7816EBZ
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EVAL-ADE7816EBZ Summary of contents
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Data Sheet FEATURES Measures active and reactive energy, sampled waveforms, and current and voltage rms 6 current input channels and 1 voltage channel <0.1% error in active and reactive energy over a dynamic range of 1000:1 Supports current transformer and ...
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ADE7816 TABLE OF CONTENTS Features .............................................................................................. 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Characteristics ................................................................ 5 Absolute Maximum Ratings............................................................ 8 Thermal Resistance ...................................................................... 8 ESD Caution.................................................................................. 8 Pin Configuration and ...
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Data Sheet SPECIFICATIONS VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 16.384 MHz, T Table 1. Parameter 1, 2 ACCURACY Active Energy Measurement Active Energy Measurement Error (per Channel) Phase Error Between ...
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ADE7816 1, 2 Parameter WAVEFORM SAMPLING Current and Voltage Channels Signal-to-Noise Ratio, SNR Signal-to-Noise-and-Distortion Ratio, SINAD Bandwidth (−3 dB) TIME INTERVAL BETWEEN CHANNELS Measurement Error REFERENCE INPUT REF Input Voltage Range IN/OUT Input Capacitance ON-CHIP REFERENCE Reference Error Output Impedance ...
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Data Sheet TIMING CHARACTERISTICS VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 16.384 MHz, T the timing tables and diagrams, the dual function pin names are referenced by the relevant function only; ...
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ADE7816 SPI Interface Timing Table 3. SPI Interface Timing Parameters Parameter SS to SCLK Edge SCLK Period SCLK Low Pulse Width SCLK High Pulse Width Data Output Valid After SCLK Edge Data Input Setup Time Before SCLK Edge Data Input ...
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Data Sheet HSDC Interface Timing Table 4. HSDC Interface Timing Parameter Parameter HSA to HSCLK Edge HSCLK Period HSCLK Low Pulse Width HSCLK High Pulse Width Data Output Valid After HSCLK Edge Data Output Fall Time Data Output Rise Time ...
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ADE7816 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 5. Parameter VDD to AGND VDD to DGND Analog Input Voltage to AGND, IAP, IAN, IBP, IBN, ICP, ICN, IDP, IEP, IFP, IN Analog Input Voltage to VP ...
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Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 7. Pin Function Descriptions Pin No. Mnemonic Description 1, 10, 11, 20 Connect. These pins are not connected internally and should be left floating. 21, 30, 31, 33, 34, 40 ...
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ADE7816 Pin No. Mnemonic Description 24 AVDD On-Chip 2.5 V Analog Low Dropout (LDO) Regulator Access. Do not connect external active circuitry to this pin. Decouple this pin with a 4.7 μF capacitor in parallel with a ceramic 220 nF ...
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Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 1.0 +85°C +25°C 0.8 –40°C 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0.01 0.1 1 CURRENT CHANNEL (% of Full Scale) Figure 7. Active Energy Error as a Percentage of Reading (Gain = ...
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ADE7816 1.0 VDD = 3.30V VDD = 3.63V 0.8 VDD = 2.97V 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0.01 0.1 1 CURRENT CHANNEL (% of Full Scale) Figure 13. Reactive Energy Error as a Percentage of Reading ...
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Data Sheet 1.0 +85°C +25°C 0.8 –40°C 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0.1 1 CURRENT CHANNEL (% of Full Scale) Figure 19. Reactive Energy Error as a Percentage of Reading (Gain = 16, Power Factor = ...
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ADE7816 TEST CIRCUIT 3.3V 10kΩ 3. 0.22µF 0.22µF 4.7µF 4.7µ PULL_HIGH 2 SS/HSA 39 PULL_LOW 3 1µF MOSI/SDA 38 RESET 4 MISO/HSD 37 IAP 7 SCLK/SCL 36 IAN 8 HSCLK 35 IBP 9 IRQ1 32 ...
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Data Sheet TERMINOLOGY Measurement Error The error associated with the energy measurement made by the ADE7816 is defined by the following equation: Measurement Error = Energy Registered by ADE7816 True Energy Phase Error Between Channels The high-pass filter (HPF) ...
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ADE7816 QUICK START This section outlines the procedure for powering up and initializing the ADE7816. Figure 23 shows a flow diagram of the initialization steps. For detailed information, refer to the section of the data sheet that pertains to each ...
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Data Sheet INPUTS The following section provides details on the connections that are required for correct functionality. POWER AND GROUND VDD and AGND, DGND To power the ADE7816 input voltage should be provided between the VDD ...
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ADE7816 CLKIN AND CLKOUT An external clock or parallel resonant crystal is required to clock the ADE7816 external clock source is being used, it should be connected to the CLKIN pin. The required clock frequency for specified operation ...
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Data Sheet Antialiasing Filters Each analog input pin requires that a simple RC filter be connected to the input. The role of the RC filter is to prevent aliasing. The aliasing effect is caused by frequency components (which are higher ...
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ADE7816 ENERGY MEASUREMENTS This section describes the energy measurements available in the ADE7816. For information about the theory behind these measurements, refer to the AN-1137 Application Note. STARTING AND STOPPING THE DSP To obtain energy measurements, the internal processor must ...
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Data Sheet The content of the active energy register overflows from full-scale positive (0x7FFFFFFF) to full-scale negative (0x80000000) and continues to increase in value when the active power is positive. Conversely, if the active power is negative, the energy register ...
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ADE7816 The reactive energy register content overflows from full-scale positive (0x7FFFFFFF) to full-scale negative (0x80000000) and continues to increase in value when the reactive power is positive. Setting Bit 6 (RSTREAD) of the LCYCMODE (Address 0xE702) register enables a read-with-reset ...
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Data Sheet ROOT MEAN SQUARE MEASUREMENT Root mean square (rms measurement of the magnitude signal. Specifically, the rms signal is equal to the amount of dc required to produce an equivalent amount ...
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ADE7816 ENERGY CALIBRATION CHANNEL MATCHING The ADE7816 provides individual channel gain registers that allow the six current channels and the voltage channel to be matched. Matching the channels simplifies the calibration process. The IAGAIN (Address 0x4381), IBGAIN (Address 0x4382), ICGAIN ...
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Data Sheet ENERGY PHASE CALIBRATION The ADE7816 is designed to function with a variety of current transducers, including those that induce inherent phase errors. A phase error of 0.1° to 0.3° is not uncommon for a current transformer (CT). These ...
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ADE7816 POWER QUALITY FEATURES This section describes the power quality features that are available in the ADE7816. SELECTING A CURRENT CHANNEL GROUP When using the power quality features on the current channels, the group of channels to be monitored must ...
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Data Sheet The ADE7816 contains four zero-crossing detection circuits, one dedicated for the voltage channel and three for the current channels. A group of current channels ( must be selected by Bit 14 (CHANNEL_SEL) ...
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ADE7816 As shown in Figure 34, the OV bit (Bit 18) in the STATUS1 register (Address 0xE503) is set the ADE7816 condition. The overcurrent detection feature works in a similar manner; however, a group of current channels ...
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Data Sheet This method of determining the power factor does not take into account the effect of any harmonics. When Bits[10:9] (ANGLESEL) of the COMPMODE register are set to 10b, the time delays (angles) between current channels are measured. Table ...
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ADE7816 CHECKSUM The ADE7816 has a 32-bit checksum register (Address 0xE51F) that ensures that certain important configuration registers maintain their desired value during normal operation. The registers that are included in this feature are MASK0, MASK1, COMPMODE, gain, CONFIG, MMODE, ...
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Data Sheet OUTPUTS This section describes the outputs from the ADE7816. INTERRUPTS has two interrupt pins, IRQ0 and IRQ1 . Each pin is The ADE7816 managed by a 32-bit interrupt mask register, MASK0 and MASK1 (Address 0xE50A and Address 0xE50B), ...
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ADE7816 Read Operation 2 The read operation, using the I C interface of the ADE7816, is accomplished in two stages. The first stage sets the pointer to the address of the register; the second stage reads the ...
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Data Sheet The SS logic input is the chip select input. This input is used when multiple devices share the serial bus. Drive the SS input low for the entire data transfer operation. Bringing SS high during a data transfer ...
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ADE7816 HSDC Interface The high speed data capture (HSDC) interface is disabled by default. It can be used only if the ADE7816 interface. The ADE7816 SPI interface cannot be used simultaneously with the HSDC port. Bit ...
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Data Sheet Table 11 lists the time that is required to execute an HSDC data transfer for all HSDC_CFG register settings. Table 11. Communication Times for Various HSDC Settings HXFER[1:0] HGAP ...
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ADE7816 REGISTERS REGISTER PROTECTION To protect the integrity of the data stored in the data memory (located at Address 0x4380 to Address 0x43BE), a write protection mechanism is available. By default, the protection is disabled, and registers that are located ...
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Data Sheet REGISTER MAPS Table 12. Calibration and Power Quality Registers Register Bit 1 Address Name R/W Length 0x4380 VGAIN R/W 24 0x4381 IAGAIN R/W 24 0x4382 IBGAIN R/W 24 0x4383 ICGAIN R/W 24 0x4384 IDGAIN R/W 24 0x4385 IEGAIN ...
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ADE7816 Register Bit 1 Address Name R/W Length 0x43AD VARTHR1 R/W 24 0x43AE VARTHR0 R/W 24 0x43AF APNOLOAD RW 24 0x43B0 VARNOLOAD R/W 24 0x43B1 PCF_A_COEFF R/W 24 0x43B2 PCF_B_COEFF R/W 24 0x43B3 PCF_C_COEFF R/W 24 0x43B4 PCF_D_COEFF R/W 24 ...
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Data Sheet Table 14. Billable Registers Register 1 Address Name R/W 0xE400 AWATTHR R 0xE401 BWATTHR R 0xE402 CWATTHR R 0xE403 DWATTHR R 0xE404 EWATTHR R 0xE405 FWATTHR R 0xE406 AVARHR R 0xE407 BVARHR R 0xE408 CVARHR R 0xE409 DVARHR ...
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ADE7816 Register 1 Address Name R/W 0xE607 Period R 0xE608 CHNOLOAD R 0xE609 to Reserved 0xE60B 0xE60C LINECYC R/W 0xE60D ZXTOUT R/W 0xE60E COMPMODE R/W 0xE60F Gain R/W 0xE610 to Reserved 0xE616 0xE617 CHSIGN R 0xE618 CONFIG R/W 0xE700 MMODE ...
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Data Sheet Note that Address 0xE502, Address 0xE503, Address 0xE50A, and Address 0xE50B are listed in Table 30 and Table 31. Table 19. CHSTATUS Register (Address 0xE600) Default Bits Bit Name Value [15:6] Reserved 0x000 5 OICHANNEL2 0x0 4 OICHANNEL1 ...
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ADE7816 Default Bits Bit Name Value [5:3] PGA2[2:0] 0x000 [2:0] PGA1[2:0] 0x000 Table 23. CHSIGN Register (Address 0xE617) Default Bits Bit Name Value [15:7] Reserved 0x0000000 6 VAR3SIGN 0x0 5 VAR2SIGN 0x0 4 VAR1SIGN 0x0 3 Reserved 0x0 2 W3SIGN ...
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Data Sheet Table 26. ACCMODE Register (Address 0xE701) Default Bits Bit Name Value 7 REVRPSEL 0x0 6 REVAPSEL 0x0 [5:4] Reserved 0x00 [3:2] VARACC[1:0] 0x00 [1:0] WATTACC[1:0] 0x00 Table 27. LCYCMODE Register (Address 0xE702) Default Bits Bit Name Value 7 ...
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ADE7816 Interrupt Enable and Interrupt Status Registers Table 30. STATUS0 Register (Address 0xE502) and MASK0 Register (Address 0xE50A) Bits Bit Name Default Value [31:18] Reserved 0 0000 0000 0000 17 DREADY 0x0 16 Reserved 0x0 15 Reserved 0x0 14 Reserved ...
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... Data Sheet OUTLINE DIMENSIONS PIN 1 INDICATOR 0.80 0.75 0.70 SEATING PLANE ORDERING GUIDE 1 Model Temperature Range ADE7816ACPZ −40°C to +85°C ADE7816ACPZ-RL −40°C to +85°C EVAL-ADE7816EBZ RoHS Compliant Part. 6.10 0.30 6.00 SQ 0.23 5.90 0. 0.50 BSC 21 20 0.45 TOP VIEW BOTTOM VIEW 0.40 0.35 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF COMPLIANT TO JEDEC STANDARDS MO-220-WJJD. ...
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ADE7816 NOTES Rev Page Data Sheet ...
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Data Sheet NOTES Rev. 0| Page ADE7816 ...
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ADE7816 NOTES refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10390-0-2/12(0) Rev ...