AM29LV642D AMD [Advanced Micro Devices], AM29LV642D Datasheet - Page 27

• Manufacturer Part Number: AM29LV642D
• Manufacturer: AMD [Advanced Micro Devices]

COMMAND DEFINITIONS
Writing specific address and data commands or se-
quences into the command register initiates device op-
erations. Table 10 defines the valid register command
sequences. Writing incorrect address and data val-
ues or writing them in the improper sequence resets
the device to reading array data.
All addresses are latched on the falling edge of WE#
or CE# (or CE2#), whichever happens later. All data is
latched on the rising edge of WE# or CE# (or CE2#),
whichever happens first. Refer to the AC Characteris-
tics section for timing diagrams.
Reading Array Data
The device is automatically set to reading array data
after device power-up. No commands are required to
retrieve data. The device is ready to read array data
May 5, 2006 25022A2
Addresses (x16)
4Ah
4Bh
4Ch
4Dh
4Eh
4Fh
40h
41h
42h
43h
44h
45h
46h
47h
48h
49h
00C5h
0050h
0052h
0049h
0031h
0031h
0001h
0002h
0004h
0001h
0004h
0000h
0000h
0000h
00B5h
0000h
Data
Table 9. Primary Vendor-Specific Extended Query
Query-unique ASCII string “PRI”
Major version number, ASCII
Minor version number, ASCII
Address Sensitive Unlock (Bits 1-0)
0 = Required, 1 = Not Required
Silicon Revision Number (Bits 7-2)
Erase Suspend
0 = Not Supported, 1 = To Read Only, 2 = To Read & Write
Sector Protect
0 = Not Supported, X = Number of sectors in per group
Sector Temporary Unprotect
00 = Not Supported, 01 = Supported
Sector Protect/Unprotect scheme
04 = 29LV800 mode
Simultaneous Operation
00 = Not Supported, X = Number of Sectors in Bank
Burst Mode Type
00 = Not Supported, 01 = Supported
Page Mode Type
00 = Not Supported
ACC (Acceleration) Supply Minimum
00h = Not Supported, D7-D4: Volt, D3-D0: 100 mV
ACC (Acceleration) Supply Maximum
00h = Not Supported, D7-D4: Volt, D3-D0: 100 mV
Top/Bottom Boot Sector Flag
02h = Bottom Boot Device, 03h = Top Boot Device
D A T A
Am29LV642D
S H E E T
after completing an Embedded Program or Embedded
Erase algorithm.
After the device accepts an Erase Suspend command,
the device enters the erase-suspend-read mode, after
w h i c h t h e s y s t e m c a n r e a d d a t a f r o m a n y
non-erase-suspended sector. After completing a pro-
gramming operation in the Erase Suspend mode, the
system may once again read array data with the same
exception. See the Erase Suspend/Erase Resume
Commands section for more information.
The system must issue the reset command to return
the device to the read (or erase-suspend-read) mode if
DQ5 goes high during an active program or erase op-
eration, or if the device is in the autoselect mode. See
the next section, Reset Command, for more informa-
tion.
Description
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