ADE3000SXT STMicroelectronics, ADE3000SXT Datasheet - Page 19

• Manufacturer Part Number: ADE3000SXT
• Description: LCD Display Engines with Integrated DVI/ ADC and YUV Ports
• Manufacturer: STMicroelectronics

ADE3XXX
2.4
LLK_PLL_CLEAR
Line Lock PLL Block
The line lock PLL recovers a sample clock from an incoming hsync source. The response
characteristics of the line lock PLL are adjustable for optimimum response time and jitter filtering.
The phase of the sample clock is digitally adjustable by steps of 289 ps (with a 27-MHz crystal). The
I2C interface of the line lock PLL is in the LLK_CTRL clock domain which must be active for
programming.
The PLL loop filter has three ranges with independent filter parameters. When the phase detector
error remains below a programmable threshold for a programmable number of input lines, the loop
filter coefficients change. Any phase detector error above the programmed threshold reverts the
filter to the appropriate level in one line. The operation is represented in
The digital loop filter is controlled by three parameters: MFACTOR, A and B. M_FACTOR is the
desired number of clocks per input line. The A and B parameters control the response of the 2nd
order digital filter. A and B are composed of a linear and exponential component designated by the
L and E suffix, respectively. These numbers are related to the classic 2nd order damping and
natural frequency as follows:
Register Name
Damping = AL x 2
Natural Frequency = SQRT(M_FACTOR x 5 x BL x 2
fast
Table 7: Line Lock PLL Registers (Sheet 1 of 4)
(AE-12)
more than SLOW_LINE_NB
0x0800
error <= SLOW_TOL for
Figure 3: Line Lock PLL State Diagram
Addr
error > SLOW_TOL
x SQRT(5 x M_FACTOR / (BL x 2
of lines
R/W
R/W
R/W
R/W
R/W
R/W
Mode
[7:6]
[5]
[4]
[3]
[2]
[1]
[0]
slow
Bits
more than LOCK_LINE_NB
0x0
0x0
0x0
0x0
0x0
0x0
error <= LOCK_TOL for
Default
error > LOCK_TOL
(BE-34)
of lines
Reserved
Master Reset
Reset the PLL synthetic sync
Reset PLL offset
Reset PLL accumulator
Reset the low pass filter
Reset the PLL phase error
BE
)
))
lock
Figure
Description
Line Lock PLL Block
3.
19/88