ADE3000SXT STMicroelectronics, ADE3000SXT Datasheet - Page 36

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ADE3000SXT

Manufacturer Part Number
ADE3000SXT
Description
LCD Display Engines with Integrated DVI/ ADC and YUV Ports
Manufacturer
STMicroelectronics
Datasheet
Sync Measurement Block
36/88
SMEAS_SKEW_CTRL
SMEAS_SKEW_THRES
SMEAS_DELAY_VSYNC
SMEAS_REF_XK_PER_H_L
SMEAS_REF_XK_PER_H_M
SMEAS_REF_XK_PER_H_H
SMEAS_REF_XK_PER_V_L
SMEAS_REF_XK_PER_V_M
SMEAS_REF_XK_PER_V_H
SMEAS_REF_H_PER_V_L
SMEAS_REF_H_PER_V_H
SMEAS_REF_XK_V_PER_HI_L
SMEAS_REF_XK_V_PER_HI_M
SMEAS_REF_XK_V_PER_HI_H
SMEAS_REF_POLARITY
SMEAS_XK_HTOL_EXP
SMEAS_XK_VTOL_EXP
SMEAS_HSYNC_VTOL
SMEAS_FILTR_HS_WIDTH
SMEAS_ACT_POLLING
Register Name
Table 13: Sync Measurement Registers (Sheet 5 of 8)
0x011D
0x011E
0x0121
0x0122
0x0124
0x0125
0x0127
0x0129
0x012A
0x012B
0x012D
0x012E
0x012F
0x013F
0x011F
0x0120
0x0123
0x0126
0x0128
0x012C
Addr
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Mode
[7:3]
[2]
[1]
[0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:2]
[1]
[0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:0]
[7:1]
[0]
[7:0]
[7:0]
[7:0]
Bits Default
0x0
0x0
0x0
0x0
0x5
0x3
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x1
0x0
0x0
Reserved
1 = delay vsync a number of XCLKs
specified in SMEAS_DELAY_VSYNC
Reserved
Write a rising edge to start the hv-skew
measurement.
Test skew limit in XCLKs. If the skew is less
than this test limit, the
SMEASE_SKEW_STATUS register will
report an error condition.
SMEAS_DELAY_VSYNC should be
reprogrammed until the skew is large
enough to prevent vcount ambiguity.
Number of XCLKs to delay vsync.
Reference value for XCLKs per horizontal
event
actual value = programmed value + 1
Reference value for XCLKs per vertical
event
actual value = programmed value + 2
Reference value for horizontal events per
vertical event
Reference value for vertical pulse width
measurement result in XCLKs.
actual value = programmed value + 1
Reserved
Reference value for Hsync polarity.
0: active low
1: active high
Reference value for Vsync polarity.
0: active low
1: active high
Reserved
Horizontal tolerance; +/- 2
Reserved
Vertical tolerance; +/- 2
Reserved
Horizontal per vertical tolerance, +/- 2
Refer to register 0x0111
Reserved
Toggle on activity status update in Free-
running mode. No function in one-shot
mode.
Description
n
XCLKs
n
XCLKs
ADE3XXX
n

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