ADE3000SXT STMicroelectronics, ADE3000SXT Datasheet - Page 80

• Manufacturer Part Number: ADE3000SXT
• Description: LCD Display Engines with Integrated DVI/ ADC and YUV Ports
• Manufacturer: STMicroelectronics

I²C RAM Addresses
80/88
2.26
DFT_STIM_EN_1
DFT_BIST_STATUS
DFT_BIST_RESULT_0
DFT_BIST_RESULT_1
DFT_MFSR_DONE
DFT_MFSR_SIG_0
DFT_MFSR_SIG_1
DFT_MFSR_SIG_2
DFT_MFSR_SIG_3
GAM_RED
GAM_GREEN
GAM_BLUE
I²C RAM Addresses
Register Name
Name
Start Addr.
0x1000
0x1200
0x1400
0x0F10
0x0F11
0x0F14
0x0F12
0x0F13
0x0F15
0x0F16
0x0F17
0x0F18
Addr
Table 31: DFT Registers (Sheet 2 of 2)
Table 32: I²C RAM Addresses
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
End Addr.
Mode
0x13FF
0x15FF
0x11FF
R
R
R
R
[7:6]
[5]
[4]
[3]
[2]
[1]
[0]
[7:6]
[5]
[4]
[3]
[2]
[1]
[0]
[7:6]
[5]
[4]
[3]
[2]
[1]
[0]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
[7:1]
[0]
Bits
[7:0]
[7:0]
[7:0]
[7:0]
Gamma LUT, Red, LSB0,MSB0,LSB1,... (256x10)
Gamma LUT, Green, (256x10)
Gamma LUT, Blue, (256x10)
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Default
Reserved
TCON test bypass
OMUX test stimulus enable
APC test stimulus enable
OSD test stimulus enable
SCL bypass
PGEN test stimulus enable
Reserved
gamma RAM BIST end
OSD CS RAM BIST end
OSD DRB RAM BIST
OSD MB RAM BIST end
SCL coeff. RAM BIST end
SCL line buffer RAM BIST end
Reserved
SCL coeff RAM 2 BIST fail
SCL coeff RAM 1 BIST fail
SCL line buffer 4 BIST fail
SCL line buffer 3 BIST fail
SCL line buffer 2 BIST fail
SCL line buffer 1 BIST fail
Reserved
Gamma blue RAM BIST fail
Gamma green RAM BIST fail
Gamma red RAM BIST fail
OSD CS RAM1 BIST fail
OSD CS RAM 2 BIST fail
OSD DRB RAM BIST fail
OSD MB RAM BIST fail
Reserved
done signal
Video Bus MFSR
Description
Description
ADE3XXX