MT90222 ZARLINK [Zarlink Semiconductor Inc], MT90222 Datasheet - Page 111

no-image

MT90222

Manufacturer Part Number
MT90222
Description
4/8/16 Port IMA/TC PHY Device
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Synchronized access
Reset Value (Hex):
Bit #
15:12
15:4
Bit #
Bit #
15:8
7:0
9:8
11
10
3
2
1
0
7
6
5
4
Type
Type
R/W
R/W
R/W
R/W
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Table 85 - RX UTOPIA IMA Group FIFO Overflow IRQ Enable Register
Unused. Read all 0’s
Set when the UTOPIA output clock is missing or too slow. This latched bit is cleared by
writing a 0.
Set when the UTOPIA input clock is missing or too slow. This latched bit is cleared by
writing a 0.
Overflow of 1 or more of the TX UTOPIA FIFO.
Set when there is no free cell in TX Cell RAM. This latched bit is cleared by writing a 0.
Unused. Read all 0’s.
When set to 1, the corresponding bit in the Overflow Status register can generate an
interrupt. A value of 0 inhibits the generation of an interrupt. IMA Groups 7:0.
Unused. Read all 0’s.
Reserved. Write 0 for normal operation.
Counter values are latched when this bit is changed from 0 to 1 and bit 9:8 are set to 11.
Writing 0 has no effect.
Write 00 for normal operation without using the latch made.
Write 01 to latch the counter value at every rising edge of the signal at LatchClk pin.
Write 10 to latch the counter value every 8000 rising edges of the signal at LatchClk pin.
Write 11 to latch the counter value every time bit 10 of this register is written to 1.
Write: 0 for normal operation.
Read: 1 when the transfer is done, 0 when the transfer is pending.
Toggle bit. Toggles with every write access to MT90222/3/4.Write 0 for normal operation.
Reserved. Write 0 for normal operation. Read value is undetermined.
Reserved. Write 0 for normal operation.
0x040E (1 reg)
0000
0x040C (1 reg)
1 register to enable interrupts from IMA Groups. The RxClk signal must be
active for correct register operation. For MT90222 only groups 0, 1, 2 and 3 are
used.
0000
0x040F (1 reg)
0080
Table 87 - Counter Transfer Command Register
Table 86 - General Status Register
Zarlink Semiconductor Inc.
MT90222/3/4
111
Description
Description
Description
Data Sheet

Related parts for MT90222