MT90222 ZARLINK [Zarlink Semiconductor Inc], MT90222 Datasheet - Page 78

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MT90222

Manufacturer Part Number
MT90222
Description
4/8/16 Port IMA/TC PHY Device
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
7.2
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
15:13
15:13
Bit #
Bit #
Bit #
12:8
12:8
7:5
4:0
15
14
7:5
4:0
...
1
0
Detailed Register Description
Type
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
...
R
R
R
R
Enable UTOPIA PHY address of link 15. A 1 enables the PHY port Address, non-IMA
mode.
Enable UTOPIA PHY address of link 14. A 1 enables the PHY port Address, non-IMA
mode.
...
Enable UTOPIA PHY address of link 1. A 1 enables the PHY port Address, non-IMA
mode.
Enable UTOPIA PHY address of link 0. A 1 enables the PHY port Address, non-IMA
mode.
Unused. Read all 0’s.
UTOPIA PHY Address of IMA Group N+4.
Unused. Read all 0’s.
UTOPIA PHY Address of IMA Group N.
Unused. Read all 0’s.
UTOPIA PHY Address of link N+8 when in non-IMA mode.
Unused. Read all 0’s.
UTOPIA PHY Address of link N when in non-IMA mode.
0x0008-0x00B (4 regs)
1 reg. per 2 IMA Groups. IMA group 0 is paired with IMA group 4, IMA group 1
with IMA group 5 and so on. For MT90222 only groups 0,1,2 and 3 are used.
0000
0x0010 (1 reg)
1 register to enable the links in non-IMA mode.
0000
9 and so on.
0x000-0x007 (8 regs)
1 register per 2 links in non-IMA mode. Link 0 is paired with link 8, link 1 with link
0000
Table 9 - UTOPIA Output Link PHY Enable Registers
Table 8 - UTOPIA Output Group Address Registers
Table 7 - UTOPIA Output Link Address Registers
Zarlink Semiconductor Inc.
MT90222/3/4
78
Description
Description
Description
Data Sheet

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