MT90880B ZARLINK [Zarlink Semiconductor Inc], MT90880B Datasheet - Page 50

• Manufacturer Part Number: MT90880B
• Description: TDM to Packet Processors
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

MT90880/1/2/3
Data Sheet
context in the remote WAN Transmit Controller is updated and ready to receive the modified packets prior to
applying the changes to the local WAN Receiver.
To add new channels to an existing context, the context lookup table is programmed to enter the context ID
against all the new members of the context. As with context setup, the New Valid Channel bit is set for all new
members, and the New First Channel bit is set to indicate the first channel in the sequence (if this is to change).
The Valid Channel and First Channel bits are cleared.
Similarly, to delete channels from a context, the New Valid Channel bit (and New First Channel bit if this was the
original first channel) is cleared. For these channels the Valid Channel and First Channel bits are left alone.
When the programming of the context modification is complete, the Update bit in the Context Memory is set.
This bit initiates the actual modification of the context. On completion of the current packet formation the update
cycle starts. The timeslot pointer cycles round until it finds the first channel of the given context. At this point the
state machine copies the New Valid Channel and New First Channel bits across into the Valid Channel and First
Channel bits. The timeslot data is read and placed into the data cache.
Each time the timeslot pointer finds more channels that are valid members of the context, the bits are copied
across in the same way, and the data read into the cache. When the pointer has circulated back round to the
first channel, the context setup is complete, and the Update bit in context memory is cleared.
The result at the end of the cycle is that all new channels, as indicated by the New Valid Channel bit are now
valid members of the context, and that all channels where the New Valid Channel bit was cleared have now
been deleted from the context.
The first packet built by the WAN Receive Controller is indicated to the receiving device by the toggling of the
context switch bit in the Context Descriptor (see Figure 19). This triggers a context update cycle at the WAN
Transmit Controller, ensuring the context update is correctly synchronized between the two devices.
Context Removal
Context removal is controlled by the use of the "teardown" control bit in the context memory. This causes the
internal state machine to send one last packet, while automatically clearing all the flags in the Context Look-Up
Table. As with context setup and modification, context removal has to be co-ordinated with that of the WAN
Transmit Controller in the receiving device. This is described in Table 17 on page 39.
6.4.2
Jitter Buffer Operation
TDM packets received from the network are forwarded into a set of queues, while waiting for processing by the
WAN Transmit Controller. Each context has a separate queue, used to buffer the constant bit rate TDM
interfaces from the variable delays experienced in the packet network. The queues are therefore known as
"jitter buffers". The WAN Transmit block reads packets from the jitter buffer at a regular rate, before
re-formatting the data for transmission over the WAN Access Interface or the Local TDM interface.
The size of jitter buffer translates directly into latency, since packets wait in the queue until the time to comes to
be serviced. Most telecommunications applications are quite sensitive to latency, and attempt to minimise the
overall end to end latency. However, if the jitter buffer is not big enough to cover the full variation in packet delay
through the network (PDV), the buffer will either overflow or empty completely (underrun). Both of these
conditions will result in data corruption.
The initial size of the buffer is programmable in units of TDM frame periods (125 µ s). This is done by delaying
the WAN Transmit Controller from reading the first packet received on a new context for the specified number of
frames. This has the effect of setting the latency through the jitter buffer at the programmed value.
However, the buffer can grow or shrink with time. When the variation in packet delay through the network is
greater than the programmed buffer latency, occasional packets will arrive too late, and the TDM interface will
be starved of data.
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