S71GL256NB0 SPANSION [SPANSION], S71GL256NB0 Datasheet - Page 11

• Manufacturer Part Number: S71GL256NB0
• Description: Stacked Multi-chip Product (MCP)
• Manufacturer: SPANSION [SPANSION]

Input/Output Descriptions
Logic Symbol
December 7, 2004 S71GL512_256_128NB0_00_A1
A24-A0
A23-A0
A22-A0
DQ15-DQ0
OE#
WE#
V
NC
RESET#
WP#/ACC
CE1#s, CE2s
CE#f1
V
V
UB#s
LB#s
RFU
RY/BY#
SS
CC
CC
f
s
A d v a n c e
Max+1
*Max = A24
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
I n f o r m a t i o n
LB#
CE#f1
CE1#s
CE2s
OE#
WE#
WP#/ACC
A
WE#
RESET#
UB#
25 Address inputs (512 Mb)
24 Address inputs (256 Mb)
23 Address inputs (128 Mb)
Data input/output
Output Enable input. Asynchronous relative to CLK
for the Burst mode.
Write Enable input.
Ground
No Connect; not connected internally
Hardware reset input. Low = device resets and
returns to reading array data
Hardware write protect input / programming
acceleration input.
Chip-enable input for pSRAM.
Chip-enable input for Flash 1.
Flash 3.0 Volt-only single power supply.
pSRAM Power Supply.
Upper Byte Control (pSRAM).
Lower Byte Control (pSRAM).
Reserved for future use.
Ready/Busy output.
Max
*–A0
DQ15–DQ0
RY/BY#
16
11