AM49DL640BG25IS SPANSION [SPANSION], AM49DL640BG25IS Datasheet - Page 42

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AM49DL640BG25IS

Manufacturer Part Number
AM49DL640BG25IS
Description
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
Manufacturer
SPANSION [SPANSION]
Datasheet
FLASH AC CHARACTERISTICS
Hardware Reset (RESET#)
Note: Not 100% tested.
March 8, 2002
JEDEC
Parameter
CE#f, OE#
CE#f, OE#
RESET#
RESET#
RY/BY#
RY/BY#
t
t
Ready
Ready
t
Std
t
t
t
RPD
RP
RH
RB
RESET# Pin Low (During Embedded Algorithms)
to Read Mode (See Note)
RESET# Pin Low (NOT During Embedded
Algorithms) to Read Mode (See Note)
RESET# Pulse Width
Reset High Time Before Read (See Note)
RESET# Low to Standby Mode
RY/BY# Recovery Time
Reset Timings NOT during Embedded Algorithms
t
Ready
t
t
Reset Timings during Embedded Algorithms
RP
RP
Description
Figure 15. Reset Timings
P R E L I M I N A R Y
t
Ready
Am49DL640BG
t
RH
Max
Max
Min
Min
Min
Min
All Speed Options
t
RB
500
500
20
20
50
0
Unit
ns
ns
ns
ns
s
s
41

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