AM49DL640BG25IS SPANSION [SPANSION], AM49DL640BG25IS Datasheet - Page 53

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AM49DL640BG25IS

Manufacturer Part Number
AM49DL640BG25IS
Description
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
Manufacturer
SPANSION [SPANSION]
Datasheet
pSRAM AC CHARACTERISTICS
Read Cycle
Notes:
1. t
2. If CE#, LB#, or UB# goes low at the same time or before
52
Parameter
Symbol
the outputs achieve the open circuit condition and are
not referenced to output voltage levels.
WE# goes high, the outputs will remain at high impedance.
OD,
t
t
t
t
t
Addresses
t
ACC
t
t
t
COE
OEE
t
t
ODO
t
t
t
t
t
AOH
A0 to A20
RC
CO
OE
BA
BE
OD
BD
OH
PM
PC
AA
I/O1 to 16
LB#, UB#
t
ODo
CE#1
D
, t
WE#
CE2
OE#
OUT
BD
, and t
Description
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Data Byte Control Access Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Data Byte Control Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Data Byte Control High to Output High-Z
Output Data Hold from Address Change
Page Mode Time
Page Mode Cycle Time
Page Mode Address Access Time
Page Output Data Hold Time
ODW
are defined as the time at which
High-Z
Figure 28. Psuedo SRAM Read Cycle
t
ACC
t
P R E L I M I N A R Y
COE
t
CO
t
OEE
t
t
Am49DL640BG
BE
OE
t
BA
Indeterminate
3. If CE#, LB#, or UB# goes low at the same time or after WE#
t
RC
goes low, the outputs will remain at high impedance.
Max
Max
Max
Max
Max
Max
Max
Max
Min
Min
Min
Min
Min
Min
Min
Min
Valid Data Out
70
70
70
70
Speed
t
BD
25
25
10
20
20
20
10
70
30
10
30
0
0
t
ODO
t
OD
t
OH
85
85
85
85
March 8, 2002
Fixed High
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
High-Z

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