AM49DL640BG25IS SPANSION [SPANSION], AM49DL640BG25IS Datasheet - Page 48

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AM49DL640BG25IS

Manufacturer Part Number
AM49DL640BG25IS
Description
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
Manufacturer
SPANSION [SPANSION]
Datasheet
FLASH AC CHARACTERISTICS
Note: VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status
read cycle, and array data read cycle.
March 8, 2002
Note: DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE#f to
toggle DQ2 and DQ6.
Addresses
DQ6/DQ2
WE#
DQ6
DQ2
RY/BY#
CE#f
WE#
OE#
Embedded
Erasing
Enter
Valid Data
t
DH
t
OEH
Erase
Figure 23. Toggle Bit Timings (During Embedded Algorithms)
Suspend
Erase
Erase Suspend
(first read)
Status
Valid
Read
P R E L I M I N A R Y
t
OEPH
Figure 24. DQ2 vs. DQ6
Suspend Program
Enter Erase
Am49DL640BG
t
AHT
t
OE
(second read)
t
ASO
Status
Valid
Suspend
Program
Erase
t
CEPH
t
t
AHT
AS
Erase Suspend
Read
(stops toggling)
Resume
Erase
Status
Valid
Erase
Valid Data
Complete
Erase
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