OR3T125-5BA352 AGERE [Agere Systems], OR3T125-5BA352 Datasheet - Page 123

• Manufacturer Part Number: OR3T125-5BA352
• Description: 3C and 3T Field-Programmable Gate Arrays
• Manufacturer: AGERE [Agere Systems]

Data Sheet
June 1999
Lucent Technologies Inc.
Timing Characteristics
Clock Timing
Table 52 . ExpressCLK (ECLK) and Fast Clock (FCLK) Timing Characteristics
OR3Cxx Commercial: V
OR3Txxx Commercial: V
Notes:
The ECLK delays are to all of the PICs on one side of the device for middle pin input, or two sides of the device for corner pin input. The delay
includes both the input buffer delay and the clock routing to the PIC clock input.
The FCLK delays are for a fully routed clock tree that uses the ExpressCLK input into the fast clock network. It includes both the input buffer
delay and the clock routing to the PFU CLK input. The delay will be reduced if any of the clock branches are not used.
Clock Control Timing Delay Through
Delay Through CLKCNTRL (input from inter-
Clock Shutoff Timing:
ECLK Delay (middle pad):
ECLK Delay (corner pad):
FCLK Delay (middle pad):
FCLK Delay (corner pad):
CLKCNTRL (input from corner)
nal clock controller PAD)
Setup from Middle ECLK (shut off to CLK)
Hold from Middle ECLK (shut off from CLK)
Setup from Corner ECLK (shut off to CLK)
Hold from Corner ECLK (shut off from CLK)
OR3T20
OR3T30
OR3C/T55
OR3C/T80
OR3T125
OR3T20
OR3T30
OR3C/T55
OR3C/T80
OR3T125
OR3T20
OR3T30
OR3C/T55
OR3C/T80
OR3T125
OR3T20
OR3T30
OR3C/T55
OR3C/T80
OR3T125
(T
J
= 85 °C, V
Device
DD
DD
DD
= 5.0 V ± 5%, 0 °C
= 3.0 V to 3.6 V, 0 °C
= min)
(continued)
<
ECLKM_DEL
ECLKM_DEL
ECLKC_DEL
ECLKC_DEL
FCLKM_DEL
FCLKC_DEL
T
OFFM_SET
OFFM_HLD
OFFC_SET
OFFC_HLD
<
A
Symbol
<
T
A
70 °C; Industrial: V
<
70 °C; Industrial: V
0.31
1.54
0.77
0.00
0.77
0.00
Min
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-4
10.34
11.01
Max
3.50
3.67
5.47
5.64
8.24
8.87
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DD
DD
= 5.0 V ± 10%, –40 °C
0.31
1.17
0.51
0.00
0.51
0.00
Min
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
= 3.0 V to 3.6 V, –40 °C
ORCA Series 3C and 3T FPGAs
-5
10.07
Max
2.56
2.62
2.74
2.86
3.06
4.48
4.53
4.64
4.77
4.96
5.91
6.12
6.59
7.11
7.98
7.88
8.11
8.60
9.15
—
—
—
—
—
—
Speed
0.31
1.00
0.44
0.00
0.44
0.00
Min
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-6
Max
2.05
2.08
2.13
2.19
2.29
3.85
3.97
4.22
4.47
4.85
4.59
4.66
4.83
5.01
5.33
6.41
6.58
6.95
7.34
7.96
<
—
—
—
—
—
—
T
A
<
<
T
0.31
0.92
0.41
0.00
0.41
0.00
Min
+85 °C.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
A
<
-7
+85 °C.
Max
1.78
1.80
1.85
1.90
1.98
3.36
3.47
3.69
3.92
4.27
3.81
3.89
4.06
4.26
4.59
5.40
5.58
5.94
6.33
6.94
—
—
—
—
—
—
Unit
123
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