EN29F002AB-45JC EON [Eon Silicon Solution Inc.], EN29F002AB-45JC Datasheet - Page 8

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EN29F002AB-45JC

Manufacturer Part Number
EN29F002AB-45JC
Description
2 Megabit (256K x 8-bit) Flash Memory
Manufacturer
EON [Eon Silicon Solution Inc.]
Datasheet
Table 5. EN29F002A Command Definitions
Notes:
RA = Read Address: address of the memory location to be read. This one is a read cycle.
RD = Read Data: data read from location RA during Read operation. This one is a read cycle.
PA = Program Address: address of the memory location to be programmed
PD = Program Data: data to be programmed at location PA
SA = Sector Address: address of the sector to be erased. Address bits A17-A13 uniquely select any sector.
The data is 00h for an unprotected sector and 01h for a protected sector.
Byte Programming Command
Programming the EN29F002A is performed on a byte-by-byte basis using a four bus-cycle operation
(two unlock write cycles followed by the Program Setup command and Program Data Write cycle).
When the program command is executed, no additional CPU controls or timings are necessary. The
program operation is terminated automatically by an internal timer. Address is latched on the falling
edge of CE or
is first. The program operation is completed when EN29F002A returns the equivalent data to the
programmed location.
Programming status may be checked by sampling data on DQ7 ( DATA polling) or on DQ6 (toggle
bit). Changing data from 0 to 1 requires an erase operation. When programming time limit is
exceeded, DQ5 will produce a logical “1” and a Reset command can return the device to Read
mode.
EN29F002A ignores commands written during Byte Programming. If a hardware RESET occurs
during Byte Programming, data at the programmed location may get corrupted. Programming is
allowed in any sequence and across any sector boundary.
Chip Erase Command
An auto Chip Erase algorithm is employed when the Chip Erase command sequence is performed.
Although the Chip Erase command requires six bus cycles: two unlock write cycles, a setup
command, two additional unlock write cycles and the chip erase command, the user does not need
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
Read/Reset
Read/Reset
AutoSelect
Manufacturer ID
AutoSelect Device ID
(Top Boot)
AutoSelect Device ID
(Bottom Boot)
AutoSelect Sector
Protect Verify
Byte Program
Chip Erase
Sector Erase
Sector Erase Suspend
Sector Erase Resume
Read/Reset
Command
Sequence
W E
, whichever is last; data is latched on the rising edge of CE or
Cycles
Req’d
Write
1
4
4
4
4
4
4
6
6
1
1
Addr
XXXh
555h
555h
555h
555h
555h
555h
555h
555h
xxxh
xxxh
Write Cycle
1
st
Data
AAh AAAh
AAh AAAh
AAh AAAh
AAh AAAh
AAh AAAh
AAh AAAh
AAh AAAh
AAh AAAh
B0h
F0h
30h
Addr
Write Cycle
RA
Rev. A, Issue Date: 2003/03/26
2
nd
Data
8
55h
55h
55h
55h
55h
55h
55h
55h
RD
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Addr
555h
555h
555h
555h
555h
555h
555h
555h
Write Cycle
EN29F002A / EN29F002AN
3
rd
Data
A0h
F0h
90h
90h
90h
90h
80h
80h
Addr
000h/
001h/
001h/
100h
101h
101h
SA &
555h
555h
Write Cycle
02h
RA
PA
4
th
Data
7Fh/
7Fh/
7Fh/
00h/
AAh AAAh
AAh AAAh
1Ch
92h
97h
01h
RD
PD
Addr
Write Cycle
W E
5
th
Data
, whichever
55h
55h
Addr
555h
Write Cycle
SA
6
th
Data
10h
30h

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