EMC326SP16AK Emlsi Inc., EMC326SP16AK Datasheet - Page 11
![no-image](/images/no-image-200.jpg)
EMC326SP16AK
Manufacturer Part Number
EMC326SP16AK
Description
2mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
1.EMC326SP16AK.pdf
(64 pages)
- Current page: 11 of 64
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Figure 4: WRITE Operation (ADV# LOW)
Page Mode Read Operation
Page mode is a performance-enhancing extension to the legacy asynchronous READ operation. In page-mode-capable products, an
initial asynchronous read access is performed, then adjacent addresses can be read quickly by simply changing the low-order
address. Addresses A[3:0] are used to determine the members of the 16-address CellularRAM page. Any change in addresses A[4]
or higher will initiate a new t
fact that adjacent addresses can be read in a shorter period of time than random addresses. WRITE operations do not include
comparable page mode functionality. During asynchronous page mode operation, the CLK input must be held LOW. CE# must be
driven HIGH upon completion of a page mode access. WAIT will be driven while the device is enabled and its state should be ignored.
Page mode is enabled by setting RCR[7] to HIGH. ADV# must be driven LOW during all page mode READ accesses. Due to refresh
considerations, CE# must not be LOW longer than t
Figure 5: Page Mode READ Operation (ADV# LOW)
AA
access time. Figure 5 shows the timing for a page mode access. Page mode takes advantage of the
LB#/UB#
LB#/UB#
Address
Address
DATA
DATA
WE#
WE#
CE#
OE#
CE#
OE#
CEM
.
t
Add0
AA
t
WC
D0
t
Address Valid
APA
= WRITE Cycle Time
Add1 Add2 Add3
11
<
< t
D1
t
t
Data Valid
CEM
APA
CEM
D2
t
APA
Don’t Care
D3
Don’t Care
EMC326SP16AK
2Mx16 CellularRAM
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