EMC326SP16AK Emlsi Inc., EMC326SP16AK Datasheet - Page 33
EMC326SP16AK
Manufacturer Part Number
EMC326SP16AK
Description
2mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
1.EMC326SP16AK.pdf
(64 pages)
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Table 16: Asynchronous WRITE Cycle Timing Requirements
Note:
1. The High-Z timings measure a 100mV transition from either V
2. The Low-Z timings measure a 100mV transition away from the High-Z (VccQ/2) level toward either V
3. WE# Low time must be limited to t
Address and ADV# LOW setup time
Address HOLD from ADV# going HIGH
Address setup to ADV# going HIGH
Address valid to end of WRITE
LB#/UB# select to end of WRITE
CE# LOW to WAIT valid
CE# HIGH between subsequent async operations
CE# LOW to ADV# HIGH
Chip enable to end of WRITE
Data HOLD from WRITE time
Data WRITE setup time
Chip disable to WAIT High-Z output
Chip enable to Low-Z output
End WRITE to Low-Z output
ADV# pulse width
ADV# setup to end of WRITE
WRITE cycle time
WRITE to DQ High-Z output
WRITE pulse width
WRITE pulse width HIGH
WRITE recovery time
Parameter
CEM
(4
µ
s).
OH
Symbol
t
t
or V
t
t
t
t
t
t
t
t
CEW
t
t
t
WHZ
t
WPH
t
t
CPH
CVS
t
t
t
t
AVH
AVS
t
CW
DW
OW
WC
WR
AW
BW
WP
AS
DH
HZ
VP
VS
LZ
OL
33
toward VccQ/2.
Min
70
70
70
20
10
70
70
45
10
0
2
5
1
5
7
0
5
5
0
-
-
70ns
OH
Max
or V
7.5
7
7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
OL
EMC326SP16AK
.
2Mx16 CellularRAM
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1
2
2
1
3
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