EMC326SP16AK Emlsi Inc., EMC326SP16AK Datasheet - Page 45
![no-image](/images/no-image-200.jpg)
EMC326SP16AK
Manufacturer Part Number
EMC326SP16AK
Description
2mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
1.EMC326SP16AK.pdf
(64 pages)
- Current page: 45 of 64
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Figure 34. Burst READ Row boundary crossing
Note:
1. Non-default BCR settings for burst READ at end of row : fixed or variable latency, WAIT active LOW, WAIT asserted during delay. (shown as
2. WAIT will be assert for LC cycles for variables latency, or LC cycles for fixed latency.
DQ[15:0]
solid line)
UB#/LB#
A[20:0]
ADV#
WAIT
WE#
CLK
OE#
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
OH
OL
IH
IL
IH
IL
IH
IL
OH
IH
IL
OL
t
Valid output
CLK
t
SP
t
HD
t
t
KOH
KTHL
Valid output
End of row
Note 2
45
t
KTHL
EMC326SP16AK
t
KOH
Valid output
2Mx16 CellularRAM
Valid output
Don’t Care
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