ATMEGA128-16AU SL383 Atmel, ATMEGA128-16AU SL383 Datasheet - Page 186

• Manufacturer Part Number: ATMEGA128-16AU SL383
• Manufacturer: Atmel

Asynchronous
Operational Range
186
ATmega128
Figure 85. Stop Bit Sampling and Next Start Bit Sampling
The same majority voting is done to the stop bit as done for the other bits in the frame. If the stop
bit is registered to have a logic 0 value, the Frame Error (FE) flag will be set.
A new high to low transition indicating the start bit of a new frame can come right after the last of
the bits used for majority voting. For Normal Speed mode, the first low level sample can be at
point marked (A) in
(C) marks a stop bit of full length. The early start bit detection influences the operational range of
the receiver.
The operational range of the Receiver is dependent on the mismatch between the received bit
rate and the internally generated baud rate. If the Transmitter is sending frames at too fast or too
slow bit rates, or the internally generated baud rate of the receiver does not have a similar (see
Table
The following equations can be used to calculate the ratio of the incoming data rate and internal
receiver baud rate.
D
S
S
S
R
baud rate. R
the receiver baud rate.
Table 75
normal speed mode has higher toleration of baud rate variations.
F
M
slow
(U2X = 0)
(U2X = 1)
Sample
Sample
is the ratio of the slowest incoming data rate that can be accepted in relation to the receiver
RxD
Sum of character size and parity size (D = 5 to 10-bit)
Samples per bit. S = 16 for Normal Speed mode and S = 8 for Double Speed
mode.
First sample number used for majority voting. S
for Double Speed mode.
Middle sample number used for majority voting. S
S
75) base frequency, the Receiver will not be able to synchronize the frames to the start bit.
M
and
= 5 for Double Speed mode.
R
slow
fast
Table 76
is the ratio of the fastest incoming data rate that can be accepted in relation to
=
Figure
------------------------------------------ -
S 1
–
1
1
list the maximum receiver baud rate error that can be tolerated. Note that
(
D
+
2
85. For Double Speed mode the first low level must be delayed to (B).
+
D S ⋅
1
3
2
)S
+
4
S
F
5
3
6
7
4
8
STOP 1
9
5
F
10
= 8 for Normal Speed and S
M
R
= 9 for Normal Speed and
fast
0/1
(A)
6
=
0/1
-----------------------------------
(
D
0/1
0/1
(B)
(
+
D
1
+
)S
2
)S
+
S
M
(C)
2467S–AVR–07/09
F
= 4