MT48LC2M32B2TG-6 :G Micron, MT48LC2M32B2TG-6 :G Datasheet - Page 51

• Manufacturer Part Number: MT48LC2M32B2TG-6 :G
• Description: DRAM Chip SDRAM 64M-Bit 3.3V 86-Pin TSOP-II
• Manufacturer: Micron

Timing Diagrams
Figure 33:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
COMMAND
DQM 0–3
BA0, BA1
A0–A9
CKE
A10
CLK
DQ
T = 100µs
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Power-up:
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CK stable
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DD
Initialize and Load Mode Register
and
t CKS
t CMS
T0
Notes:
NOP
t CKH
t CMH
High-Z
SINGLE BANK
t CMS
ALL BANKS
t CK
1. The mode register may be loaded prior to the AUTO REFRESH cycles if desired.
2. Outputs are guaranteed High-Z after command is issued.
PRECHARGE
BANKS
T1
ALL
t CMH
t RP
Precharge
all banks
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t CMS
Tn + 1
REFRESH
AUTO
t CMH
t CH
AUTO REFRESH
t RFC
NOP
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NOP
51
t CL
To + 1
REFRESH
AUTO
AUTO REFRESH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t RFC
NOP
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NOP
t AS
t AS
t AS
LOAD MODE
Tp + 1
REGISTER
CODE
CODE
CODE
t AH
t AH
t AH
Program Mode Register
©2001 Micron Technology, Inc. All rights reserved.
64Mb: x32 SDRAM
t MRD
Tp + 2
Timing Diagrams
NOP
1, 2
Tp + 3
ACTIVE
BANK
ROW
ROW
DON’T CARE
UNDEFINED