MT48LC2M32B2TG-6 :G Micron, MT48LC2M32B2TG-6 :G Datasheet - Page 58
![no-image](/images/no-image-200.jpg)
MT48LC2M32B2TG-6 :G
Manufacturer Part Number
MT48LC2M32B2TG-6 :G
Description
DRAM Chip SDRAM 64M-Bit 3.3V 86-Pin TSOP-II
Manufacturer
Micron
Datasheet
1.MT48LC2M32B2B5-7G.pdf
(69 pages)
- Current page: 58 of 69
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Figure 40:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
COMMAND
BA0, BA1
DQM 0-3
A0-A9
CKE
CLK
A10
DQ
t CKS
t CMS
t AS
t AS
t AS
READ – with Auto Precharge
ACTIVE
T0
ROW
ROW
BANK
t CMH
t CKH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
NOP
1. For this example, BL = 4 and CL = 2.
2. A8 and A9 = “Don’t Care.”
ENABLE AUTO PRECHARGE
t CMS
t CL
COLUMN m 2
T2
BANK
READ
t CMH
t CH
CAS Latency
T3
NOP
t LZ
t AC
58
T4
NOP
D
OUT
t OH
t AC
m
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
OUT
T5
NOP
m + 1
t OH
t AC
D
T6
OUT
NOP
m + 2
t OH
t AC
t RP
©2001 Micron Technology, Inc. All rights reserved.
D
T7
OUT
NOP
64Mb: x32 SDRAM
m + 3
t OH
Timing Diagrams
t HZ
T8
ROW
BANK
ACTIVE
ROW
DON’T CARE
UNDEFINED
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