IDT74SSTVN16859PAG IDT, Integrated Device Technology Inc, IDT74SSTVN16859PAG Datasheet - Page 6

• Manufacturer Part Number: IDT74SSTVN16859PAG
• Description: IC BUFFER 13-26BIT SSTL 64-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT74SSTVN16859PAG

• Logic Type: 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs
• Supply Voltage: 2.3 V ~ 2.7 V
• Number Of Bits: 13, 26
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-TSSOP
• Logic Family: SSTV
• Logical Function: Registered Buffer
• Number Of Elements: 1
• Number Of Inputs: 13
• Number Of Outputs: 26
• High Level Output Current: -16mA
• Low Level Output Current: 16mA
• Propagation Delay Time: 2.7ns
• Operating Supply Voltage (typ): 2.5V
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 220(Min)MHz
• Mounting: Surface Mount
• Pin Count: 64
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74SSTVN16859PAG

NOTES:
1. C
2. I
3. All input pulses are supplied by generators having the following characteristics: PRR ≤10MHz, Z
4. The outputs are measured one at a time with one transition per measurement.
5. V
6. V
7. V
8. t
TEST CIRCUITS AND WAVEFORMS
FOR PC1600 - PC2700, V
FOR PC3200, V
IDT74SSTVN16859
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O
LVCMOS
Input
Timing
RESET
(see note 2)
I
DD
Input
DD
PDM
Input
TT
Input
IH
IL
L
= V
= V
includes probe and jig capacitance.
tested with clock and data inputs held at V
= V
is t
REF
REF
REF
PD
t
INACT
with one output switching. t
Voltage Waveforms - Setup and Hold Times
+ 310mV (AC voltage levels) for differential inputs. V
- 310mV (AC voltage levels) for differential inputs. V
= V
DDQ
Voltage Waveforms - Pulse Duration
Inputs Active and Inactive Times
Voltage and Current Waveforms
/2
V
DD
V
/2
REF
V
10%
REF
t
SU
DD
t
W
= 2.6V ± 0.1V
PDMSS
V
ICR
t
is t
DD
H
PD
or GND, and I
with all outputs switching.
DD
V
REF
V
V
= 2.5V ± 0.2V
DD
REF
C
(see note 1)
L
/2
90%
= 30 pF
O
t
ACT
IL
IH
= 0mA.
= GND for LVCMOS input.
= V
V
V
DD
V
IH
IL
V
V
V
0V
DD
I(PP)
IH
IL
for LVCMOS input.
Load Circuit
6
LVCMOS
Timing
Output
RESET
Output
V
Input
Input
O
TT
Voltage Waveforms - Propagation Delay Times
Voltage Waveforms - Propagation Delay Times
= 50Ω, input slew rate = 1 V/ns ±20% (unless otherwise specified).
R
Test Point
L
= 50Ω
t
PLH
V
ICR
V
COMMERCIAL TEMPERATURE RANGE
TT
V
DD
/2
t
V
PHL
V
ICR
TT
V
t
PHL
TT
V
V
V
I(PP)
V
V
OH
OL
V
V
OH
OL
IH
IL