LPC1113FHN33/203,5 NXP Semiconductors, LPC1113FHN33/203,5 Datasheet - Page 161

• Manufacturer Part Number: LPC1113FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1113FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1113
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 24 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

10.1 How to read this chapter
Table 164. LPC11xx pin configurations for 20-pin and 28-pin packages
10.2 Pin configuration (LPC1110/11/12)
UM10398
User manual
Part
LPC1110FD20
LPC1111FDH20/002 Pin configuration
LPC1112FD20/102
LPC1112FDH20/102 Pin configuration
LPC1112FDH28/102 Pin configuration
LPC1114FDH28/102 Pin configuration
LPC1114FN28/102
Fig 22. Pin configuration SO20 package
SWCLK/PIO0_10/SCK0/CT16B0_MAT2
SWDIO/PIO1_3/AD4/CT32B1_MAT2
Pin configuration
Pin description
Pin description
Pin configuration
Pin description
Pin description
Pin description
Pin description
Pin configuration
Pin description
This chapter describes the small pin packages for the LPC111x parts in TSSOP, DIP, and
SO packages.
R/PIO0_11/AD0/CT32B0_MAT3
PIO0_8/MISO0/CT16B0_MAT0
PIO0_9/MOSI0/CT16B0_MAT1
R/PIO1_0/AD1/CT32B1_CAP0
R/PIO1_1/AD2/CT32B1_MAT0
R/PIO1_2/AD3/CT32B1_MAT1
UM10398
Chapter 10: LPC111x Pin configuration (LPC1100L series,
TSSOP, DIP, SO packages)
Rev. 12 — 24 September 2012
PIO0_6/SCK0
PIO0_5/SDA
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
SO20
Figure 22
Table 165
-
-
Figure 22
Table 165
-
-
-
-
-
-
-
-
10
1
2
3
4
5
6
7
8
9
LPC1112FD20/
LPC1110FD20
102
002aag595
TSSOP20
-
-
Figure 23
Table 165
-
-
Figure 24
Table 166
-
-
-
-
-
-
20
19
18
17
16
15
14
13
12
11
PIO0_4/SCL
PIO0_2/SSEL0/CT16B0_CAP0
PIO0_1/CLKOUT/CT32B0_MAT2
RESET/PIO0_0
V
V
XTALIN
XTALOUT
PIO1_7/TXD/CT32B0_MAT1
PIO1_6/RXD/CT32B0_MAT0
SS
DD
TSSOP28
-
-
-
-
-
-
-
-
Figure 25
Table 167
Figure 25
Table 167
-
-
© NXP B.V. 2012. All rights reserved.
DIP28
-
-
-
-
-
-
-
-
-
-
-
-
Figure 26
Table 167
User manual
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