1893CFLFT IDT, 1893CFLFT Datasheet - Page 10

• Manufacturer Part Number: 1893CFLFT
• Description: Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
• Manufacturer: IDT

Specifications of 1893CFLFT

• Rohs: yes
• Part # Aliases: ICS1893CFLFT

4.1 Reset Operations
4.1.1 General Reset Operations
4.1.1.1 Entering Reset
4.1.1.2 Exiting Reset
4.1.1.3 Hot Insertion
ICS1893CK-40, Rev. C, 06/02/09
This section first discusses reset operations in general and then specific ways in which the ICS1893CK-40
can be configured for various reset options.
The following reset operations apply to all the specific ways in which the ICS1893CK-40 can be reset,
which are discussed in
When the ICS1893CK-40 enters a reset condition (either through hardware, power-on reset, or software),
it does the following:
1. Isolates the MAC Interface input pins
2. Drives all MAC Interface output pins low
3. Tri-states the signals on its Twisted-Pair Transmit pins (TP_TXP and TP_TXN)
4. Initializes all its internal modules and state machines to their default states
5. Enters the power-down state
6. Initializes all internal latching low (LL), latching high (LH), and latching maximum (LMX) Management
When the ICS1893CK-40 exits a reset condition, it does the following:
1. Exits the power-down state
2. Latches the Serial Management Port Address of the ICS1893CK-40 into the Extended Control
3. Enables all its internal modules and state machines
4. Sets all Management Register bits to their default values
5. Enables the Twisted-Pair Transmit pins (TP_TXP and TP_TXN)
6. Resynchronizes both its Transmit and Receive Phase-Locked Loops, which provide its transmit clock
7. Releases all MAC Interface pins, which takes a maximum of 640 ns after the reset condition is removed
As with the ICS189X products, the ICS1893CK-40 reset design supports ‘hot insertion’ of its MII. (That is,
the ICS1893CK-40 can connect its MAC Interface to a MAC while power is already applied to the MAC.)
Register bits to their default values
Register, bits 16.10:6. [See
(TXCLK) and receive clock (RXCLK)
ICS1893CK-40 Data Sheet - Release
Section 4.1.2, “Specific Reset
Copyright © 2009, Integrated Device Technology, Inc.
Section 7.11.3, “PHY Address (bits
All rights reserved.
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Operations”.
16.10:6)”.]
Chapter 4 Operating Modes Overview
June 2009