1893CFLFT IDT, 1893CFLFT Datasheet - Page 38

• Manufacturer Part Number: 1893CFLFT
• Description: Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
• Manufacturer: IDT

Specifications of 1893CFLFT

• Rohs: yes
• Part # Aliases: ICS1893CFLFT

6.5.11 10Base-T Operation: Twisted-Pair Transmitter
6.5.12 10Base-T Operation: Twisted-Pair Receiver
6.5.13 10Base-T Operation: Auto Polarity Correction
ICS1893CK-40, Rev. C, 06/02/09
An ICS1893CK-40 SQE Test Function is:
•
•
Note:
1. In 10Base-T mode, a bit time has a typical duration of 100 ns.
2. The SQE Test also has the name 10Base-T Heartbeat. For details on the SQE waveforms, see
The 10Base-T Twisted-Pair Transmitter is functionally similar to the 100Base-TX Twisted-Pair Transmitter.
The primary differences are in the data rate and signaling, as specified in the ISO/IEC specifications. For
more information, see
The 10Base-T Twisted-Pair Receiver is functionally similar the 100Base-TX Twisted-Pair Receiver. The
primary differences are in the data rate and signaling, as specified in the ISO/IEC specifications. For more
information, see
The ICS1893CK-40 can sense and then automatically correct a signal polarity that is reversed on its
Twisted-Pair Receiver inputs. A signal polarity reversal occurs when the input signals on an
ICS1893CK-40’s TP_RXP and TP_RXN pins are crossed or swapped (a problem that can occur during
network installation or wiring).
The ICS1893CK-40 accomplishes reversed signal polarity detection and correction by examining the signal
polarity of the Normal Link Pulses (NLPs). In 10Base-T mode, an ICS1893CK-40 transmits and receives
NLPs when its link is in the Idle state. In 100Base-TX mode, an ICS1893CK-40 transmits and receives
NLPs during Auto-Negotiation. An STA can control this feature using the 10Base-T Operations Register bit
18.3, the Auto Polarity-Inhibit bit. When this bit is logic:
•
•
Enabled only when all the following conditions are true:
Disabled whenever any of the following are true:
Zero, the ICS1893CK-40 automatically senses and corrects a reversed or inverted signal polarity on its
Twisted-Pair Receive pins (TP_RXP and TP_RXN).
One, the ICS1893CK-40 disables this feature.
– The ICS1893CK-40 is in node mode.
– The ICS1893CK-40 is in half-duplex mode.
– The ICS1893CK-40 has a valid link.
– The 10Base-T Operations Register’s SQE Test Inhibit bit (bit 18.2) is logic zero (the default).
– The ICS1893CK-40 TX_EN signal has transitioned from asserted (high) to de-asserted (low).
– The ICS1893CK-40 is in full-duplex mode.
– The ICS1893CK-40 detects a link failure.
– The ICS1893CK-40 SQE Test Inhibit bit (bit 18.2) in the 10Base-T Operations Register is logic one.
9.5.17, “10Base-T: Heartbeat Timing
[This bit provides the Station Management entity (STA) with the ability to disable the SQE Test
function.]
ICS1893CK-40 Data Sheet - Release
Section 6.4.6, “100Base-TX Operation: Twisted-Pair
Section 6.4.5, “100Base-TX Operation: Twisted-Pair
Copyright © 2009, Integrated Device Technology, Inc.
(SQE)”.
All rights reserved.
38
Receiver”.
Transmitter”.
Chapter 6 Functional Blocks
June 2009
Section