1893CFLFT IDT, 1893CFLFT Datasheet - Page 17

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1893CFLFT

Manufacturer Part Number
1893CFLFT
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet

Specifications of 1893CFLFT

Rohs
yes
Part # Aliases
ICS1893CFLFT

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5.1 MII Data Interface
ICS1893CK-40, Rev. C, 06/02/09
The ICS1893CK-40’s MAC Interface is the Media Independent Interface (MII) operating at either 10 Mbps
or 100 Mbps. The ICS1893CK-40 MAC Interface is configured for the MII Data Interface mode, data is
transferred between the PHY and the MAC as framed, 4-bit parallel nibbles. In addition, the interface also
provides status and control signals to synchronize the transfers.
The ICS1893CK-40 provides a full complement of the ISO/IEC-specified MII signals. Its MII has both a
transmit and a receive data path to synchronously exchange 4 bits of data (that is, nibbles).
Both the MII transmit clock and the MII receive clock are provided to the MAC/Reconciliation sublayer by
the ICS1893CK-40 (that is, the ICS1893CK-40 sources the TXCLK and RXCLK signals to the MAC).
As mentioned in
That is, it is possible to connect its MII to a MAC when power is already applied to the MAC. To support this
functionality, the ICS1893CK-40 isolates its MII signals and tri-states the signals on all Twisted-Pair
Transmit pins (TP_TXP and TP_TXN) during a power-on reset. Upon completion of the reset process, the
ICS1893CK-40 enables its MII and enables its Twisted-Pair Transmit signals.
The ICS1893CK-40’s MII transmit data path includes the following:
The ICS1893CK-40’s MII receive data path includes the following:
– A data nibble, TXD[3:0]
– A transmit data clock to synchronize transfers, TXCLK
– A transmit enable signal, TXEN
– The TXER pin is not available on the ICS1893CK-40
– A separate data nibble, RXD[3:0]
– A receive data clock to synchronize transfers, RXCLK
– A receive data valid signal, RXDV
ICS1893CK-40 Data Sheet Rev. C - Release
Section 4.1.1.3, “Hot
Copyright © 2009, Integrated Device Technology, Inc.
Insertion”, the ICS1893CK-40 design allows hot insertion of its MII.
All rights reserved.
17
Chapter 5 Interface Overviews
June 2009

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