KSZ8851-16MLLU TR Micrel, KSZ8851-16MLLU TR Datasheet - Page 72

• Manufacturer Part Number: KSZ8851-16MLLU TR
• Description: Ethernet ICs Single-Port Ethernet Controller (Automotive Grade)
• Manufacturer: Micrel

Specifications of KSZ8851-16MLLU TR

• Rohs: yes
• Product: Ethernet Controllers
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT

Example:
1. MIB Counter Read (read port 1 “Rx64Octets” counter at indirect address offset 0x0E)
Additional MIB Information
In the heaviest condition, the byte counter will overflow in 2 minutes. It is recommended that the software read all the
counters at least every 30 seconds.
MIB counters are designed as “read clear”. That is, these counters will be cleared after they are read.
May 2012
Micrel, Inc.
Offset
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
Counter Name
Rx1522to2000Octets
TxByte
TxLateCollision
TxPausePkts
TxBroadcastPkts
TxMulticastPkts
TxUnicastPkts
TxDeferred
TxTotalCollision
TxExcessiveCollision
TxSingleCollision
TxMultipleCollision
Then
Write to reg. IACR (0xC8) with 0x1C0E (set indirect address and trigger a read MIB counters operation)
Read reg. IADHR (MIB counter value 31-16)
Read reg. IADLR (MIB counter value 15-0)
Table 13. Port 1 MIB Counters Indirect Memory Offsets
Description
Total Rx packets (bad packets included) that are between 1522 and 2000 octets in length
Tx good octet count, including PAUSE packets
The number of times a collision is detected later than 512 bit-times into the Tx of a packet
Number of PAUSE frames transmitted by a port
Tx good broadcast packets (not including error broadcast or valid multicast packets)
Tx good multicast packets (not including error multicast packets or valid broadcast
packets)
Tx good unicast packets
Tx packets by a port for which the 1st Tx attempt is delayed due to the busy medium
Tx total collision, half duplex only
A count of frames for which Tx fails due to excessive collisions
Successfully Tx frames on a port for which Tx is inhibited by exactly one collision
Successfully Tx frames on a port for which Tx is inhibited by more than one collision
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KSZ8851-16MLL/MLLI
M9999-050112-2.1