S34ML02G100BHI000 Spansion, S34ML02G100BHI000 Datasheet - Page 32

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S34ML02G100BHI000

Manufacturer Part Number
S34ML02G100BHI000
Description
Flash 2Gb 3V 25ns NAND Flash
Manufacturer
Spansion
Datasheet

Specifications of S34ML02G100BHI000

Rohs
yes
Memory Type
NAND Flash
Memory Size
2 Gbit
Timing Type
Asynchronous
Access Time
20 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
BGA-63

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3.16
32
Read ID
If a Multiplane Cache Program operation is interrupted by hardware reset, power failure or other means, the
host must ensure that the interrupted pages are not used for further reading or programming operations until
the next uninterrupted block erases are complete for the applicable blocks.
The device contains a product identification mode, initiated by writing 90h to the command register, followed
by an address input of 00h.
Note: If you want to execute Read Status command (0x70) after Read ID sequence, you should input dummy
command (0x00) before Read Status command (0x70).
For the S34ML02G1 and S34ML04G1 devices, five read cycles sequentially output the manufacturer code
(01h), and the device code and 3rd, 4th, and 5th cycle ID, respectively. For the S34ML01G1 device, four read
cycles sequentially output the manufacturer code (01h), and the device code and 80h, 4th cycle ID,
respectively. The command register remains in Read ID mode until further commands are issued to it.
Figure 6.34 on page 61
meaning.
1st
2nd
3rd
4th
5th (S34ML02G1, S34ML04G1)
Density
1 Gb
2 Gb
4 Gb
1 Gb
2 Gb
4 Gb
Device Identifier Byte
Spansion
Org
x16
®
x8
shows the operation sequence, while
SLC NAND Flash Memory for Embedded
Table 3.6 Read ID for Supported Configurations
3.3V
V
CC
Manufacturer Code
Device Identifier
Internal chip number, cell type, etc.
Page Size, Block Size, Spare Size, Organization
Multiplane information
Table 3.7 Read ID Bytes
D a t a
01h
01h
01h
01h
01h
01h
1st
S h e e t
DCh
CAh
CCh
2nd
DAh
C1h
F1h
Table 3.6
Description
to
S34ML01G1_04G1_15 March 7, 2013
Table 3.11
3rd
00h
90h
90h
00h
90h
90h
explain the byte
1Dh
5Dh
D5h
D5h
95h
95h
4th
44h
54h
44h
54h
5th

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