PCAL9555APW,118 NXP Semiconductors, PCAL9555APW,118 Datasheet - Page 2

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PCAL9555APW,118

Manufacturer Part Number
PCAL9555APW,118
Description
Interface - I/O Expanders 16b I2C BUS INTERUPT
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCAL9555APW,118

Rohs
yes
Maximum Operating Frequency
100 kHz
Operating Supply Voltage
1.65 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-24
Operating Current
160 mA
Output Current
25 mA
Power Dissipation
200 mW
Product Type
I/O Expanders
Factory Pack Quantity
2500
NXP Semiconductors
2. Features and benefits
PCAL9555A
Product data sheet
2.1 Agile I/O features
I
Operating power supply voltage range of 1.65 V to 5.5 V
Low standby current consumption:
Schmitt-trigger action allows slow input transition and better switching noise immunity
at the SCL and SDA inputs
5 V tolerant I/Os
Open-drain active LOW interrupt output (INT)
400 kHz Fast-mode I
Internal power-on reset
Power-up with all channels configured as inputs and weak pull-up resistors
No glitch on power-up
Latched outputs with 25 mA drive maximum capability for directly driving LEDs
Latch-up performance exceeds 100 mA per JESD78, Class II
ESD protection exceeds JESD22
Packages offered: TSSOP24, HVQFN24
Pin to pin replacement for PCA9555 and PCA9555A with interrupts disabled at
power-up
Output port configuration: bank selectable push-pull or open-drain output stages
Interrupt status: read-only register identifies the source of an interrupt
Bit-wise I/O programming features:
2
C-bus to parallel port expander
1.5 A (typical at 5 V V
1.0 A (typical at 3.3 V V
V
2000 V Human Body Model (A114-A)
1000 V Charged-Device Model (C101)
Software backward compatible with PCA9555 and PCA9555A
times in low capacitance applications
is read
state
Output drive strength: four programmable drive strengths to reduce rise and fall
Input latch: Input Port register values changes are kept until the Input Port register
Pull-up/pull-down enable: floating input or pull-up/down resistor enable
Pull-up/pull-down selection: 100 k pull-up/down resistor selection
Interrupt mask: mask prevents the generation of the interrupt when input changes
hys
= 0.10  V
All information provided in this document is subject to legal disclaimers.
Low-voltage 16-bit GPIO with Agile I/O, interrupt and weak pull-up
DD
Rev. 1 — 3 October 2012
2
(typical)
C-bus
DD
DD
)
)
PCAL9555A
© NXP B.V. 2012. All rights reserved.
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