C8051F997-GUR Silicon Labs, C8051F997-GUR Datasheet - Page 215

• Manufacturer Part Number: C8051F997-GUR
• Description: 8-bit Microcontrollers - MCU 8kB 14-CH CDC
• Manufacturer: Silicon Labs

Specifications of C8051F997-GUR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

21.1.3. Interfacing Port I/O to 5 V Logic
All Port I/O have internal ESD protection diodes to prevent the pin voltage from exceeding the V
The Port I/O pins are not 5V tolerant and require level translators to interface to 5V logic.
21.1.4. Increasing Port I/O Drive Strength
Port I/O output drivers support a high and low drive strength; the default is low drive strength. The drive
strength of a Port I/O can be configured using the PnDRV registers. See Section “4. Electrical Characteris-
tics” on page 46 for the difference in output drive strength between the two modes.
21.2. Assigning Port I/O Pins to Analog and Digital Functions
Port I/O pins P0.0–P1.7 can be assigned to various analog, digital, and external interrupt functions. The
Port pins assuaged to analog functions should be configured for analog I/O and Port pins assuaged to dig-
ital or external interrupt functions should be configured for digital I/O.
21.2.1. Assigning Port I/O Pins to Analog Functions
Table 21.1 shows all available analog functions that need Port I/O assignments. Port pins selected for
these analog functions should have their digital drivers disabled (PnMDOUT.n = 0 and Port Latch =
1) and their corresponding bit in PnSKIP set to 1. This reserves the pin for use by the analog function
and does not allow it to be claimed by the Crossbar. Table 21.1 shows the potential mapping of Port I/O to
each analog function.
Analog Function
ADC Input
Comparator0 Input
Voltage Reference (VREF0)
Analog Ground Reference (AGND)
Current Reference (IREF0)
External Oscillator Input (XTAL1)
External Oscillator Output (XTAL2)
SmaRTClock Oscillator Input (XTAL3)
SmaRTClock Oscillator Output (XTAL4)
Table 21.1. Port I/O Assignment for Analog Functions
Rev. 1.1
Assignable Port Pins
P0.1–P0.7, P1.2–P1.4
Potentially
P1.0, P1.1
C8051F99x-C8051F98x
P0.0
P0.1
P0.7
P0.2
P0.3
P1.6
P1.7
Registers used for
IREF0CN, PnSKIP
OSCXCN, PnSKIP
OSCXCN, PnSKIP
ADC0MX, PnSKIP
CPT0MX, PnSKIP
REF0CN, PnSKIP
REF0CN, PnSKIP
RTC0CN, PnSKIP
RTC0CN, PnSKIP
Assignment
DD
supply.
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