C8051F997-GUR Silicon Labs, C8051F997-GUR Datasheet - Page 80

• Manufacturer Part Number: C8051F997-GUR
• Description: 8-bit Microcontrollers - MCU 8kB 14-CH CDC
• Manufacturer: Silicon Labs

Specifications of C8051F997-GUR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F99x-C8051F98x
5.6.1. Window Detector In Single-Ended Mode
Figure 5.5
ADC0LTH:ADC0LTL = 0x0080 (128d) and ADC0GTH:ADC0GTL = 0x0040 (64d). The input voltage can
range from 0 to VREF x (1023/1024) with respect to GND, and is represented by a 10-bit unsigned integer
value. In the left example, an AD0WINT interrupt will be generated if the ADC0 conversion word
(ADC0H:ADC0L) is within the range defined by ADC0GTH:ADC0GTL and ADC0LTH:ADC0LTL
(if 0x0040 < ADC0H:ADC0L < 0x0080). In the right example, and AD0WINT interrupt will be generated if
the ADC0 conversion word is outside of the range defined by the ADC0GT and ADC0LT registers
(if ADC0H:ADC0L < 0x0040 or ADC0H:ADC0L > 0x0080). Figure 5.6 shows an example using left-
justified data with the same comparison values.
5.6.2. ADC0 Specifications
See “4. Electrical Characteristics” on page 46 for a detailed listing of ADC0 specifications.
80
VREF x (1023/1024)
VREF x (1023/1024)
VREF x (128/1024)
VREF x (128/1024)
VREF x (64/1024)
VREF x (64/1024)
Input Voltage
(Px.x - GND)
Input Voltage
(Px.x - GND)
Figure 5.5. ADC Window Compare Example: Right-Justified Single-Ended Data
Figure 5.6. ADC Window Compare Example: Left-Justified Single-Ended Data
0
0
shows
ADC0H:ADC0L
ADC0H:ADC0L
0xFFC0
0x1FC0
0x0FC0
0x2040
0x2000
0x1040
0x1000
0x0000
0x03FF
0x0081
0x0080
0x007F
0x0041
0x0040
0x003F
0x0000
two
example
ADC0GTH:ADC0GTL
ADC0GTH:ADC0GTL
ADC0LTH:ADC0LTL
ADC0LTH:ADC0LTL
not affected
not affected
not affected
not affected
AD0WINT
AD0WINT
AD0WINT
AD0WINT
AD0WINT=1
AD0WINT=1
window
Rev. 1.1
VREF x (1023/1024)
VREF x (1023/1024)
VREF x (128/1024)
VREF x (128/1024)
comparisons
VREF x (64/1024)
VREF x (64/1024)
Input Voltage
Input Voltage
(Px.x - GND)
(Px.x - GND)
0
0
ADC0H:ADC0L
ADC0H:ADC0L
0x03FF
0xFFC0
0x1FC0
0x0FC0
0x0081
0x0080
0x007F
0x0041
0x0040
0x003F
0x0000
0x2040
0x2000
0x1040
0x1000
0x0000
for
right-justified
ADC0GTH:ADC0GTL
ADC0GTH:ADC0GTL
ADC0LTH:ADC0LTL
ADC0LTH:ADC0LTL
not affected
not affected
AD0WINT
AD0WINT
data,
AD0WINT=1
AD0WINT=1
AD0WINT=1
AD0WINT=1
with