C8051F997-GUR Silicon Labs, C8051F997-GUR Datasheet - Page 3

• Manufacturer Part Number: C8051F997-GUR
• Description: 8-bit Microcontrollers - MCU 8kB 14-CH CDC
• Manufacturer: Silicon Labs

Specifications of C8051F997-GUR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

7. Comparator ............................................................................................................. 91
8. Capacitive Sense (CS0).......................................................................................... 98
9. CIP-51 Microcontroller ......................................................................................... 118
10. Memory Organization........................................................................................... 127
11. On-Chip XRAM...................................................................................................... 130
12. Special Function Registers ................................................................................. 131
13. Interrupt Handler .................................................................................................. 137
6.2. IREF0 Specifications......................................................................................... 90
7.1. Comparator Inputs ............................................................................................ 91
7.2. Comparator Outputs ......................................................................................... 92
7.3. Comparator Response Time............................................................................. 92
7.4. Comparator Hysteresis ..................................................................................... 92
7.5. Comparator Register Descriptions.................................................................... 93
7.6. Comparator0 Analog Multiplexer ...................................................................... 96
8.1. Configuring Port Pins as Capacitive Sense Inputs ........................................... 99
8.2. Initializing the Capacitive Sensing Peripheral ................................................... 99
8.3. Capacitive Sense Start-Of-Conversion Sources............................................... 99
8.4. CS0 Multiple Channel Enable ......................................................................... 100
8.5. CS0 Gain Adjustment ..................................................................................... 100
8.6. Wake from Suspend ....................................................................................... 100
8.7. Using CS0 in Applications that Utilize Sleep Mode......................................... 100
8.8. Automatic Scanning (Method 1—CS0SMEN = 0) .......................................... 101
8.9. Automatic Scanning (Method 2—CS0SMEN = 1) .......................................... 102
8.10.CS0 Comparator............................................................................................. 102
8.11.CS0 Conversion Accumulator ........................................................................ 103
8.12.CS0 Pin Monitor ............................................................................................. 104
8.13.Adjusting CS0 For Special Situations............................................................. 105
8.14.Capacitive Sense Multiplexer ......................................................................... 116
9.1. Performance ................................................................................................... 118
9.2. Programming and Debugging Support ........................................................... 119
9.3. Instruction Set ................................................................................................. 119
9.4. CIP-51 Register Descriptions.......................................................................... 124
10.1.Program Memory............................................................................................ 128
10.2.Data Memory .................................................................................................. 128
11.1.Accessing XRAM............................................................................................ 130
12.1.SFR Paging .................................................................................................... 132
13.1.Enabling Interrupt Sources ............................................................................. 137
13.2.MCU Interrupt Sources and Vectors............................................................... 137
13.3.Interrupt Priorities ........................................................................................... 138
9.3.1. Instruction and CPU Timing ................................................................... 119
10.1.1.MOVX Instruction and Program Memory ............................................... 128
10.2.1.Internal RAM .......................................................................................... 128
10.2.2.External RAM ......................................................................................... 129
11.1.1.16-Bit MOVX Example ........................................................................... 130
11.1.2.8-Bit MOVX Example ............................................................................. 130
Rev. 1.1
C8051F99x-C8051F98x
3