DS32508N-W Maxim Integrated, DS32508N-W Datasheet - Page 105
DS32508N-W
Manufacturer Part Number
DS32508N-W
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS32512W.pdf
(130 pages)
Specifications of DS32508N-W
Part # Aliases
90-32508-NW0
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Table 11-10. JTAG Interface Timing
(VDD18 = 1.8V ±5%, VDD33 = 3.3V ±5%, AVDD = 1.8V ±5%, T
(See
Figure 11-12. JTAG Timing Diagram
Note 1:
Note 2:
JTCLK
JTCLK
JTCLK
JTCLK
JTCLK
JTCLK
JTRST
Figure
Width Low Time
Clock Period
Clock High/Low Time (Note 1)
to JTDI,
to JTDI,
to
to
Clock can be stopped high or low.
Not tested during production test.
JTDO
JTDO
JTRST
JTCLK
11-12.)
JTRST
JTMS
JTDO
JTDI
JTMS
JTMS
Delay
High-Z Delay (Note 2)
PARAMETER
Setup Time
Hold Time
t6
t7
t2
t4
105 of 130
t1
t5
SYMBOL
t2/t3
t1
t4
t5
t6
t7
t8
t3
A
t8
= -40°C to +85°C.)
MIN
100
50
50
50
2
2
1000
DS32506/DS32508/DS32512
TYP
500
MAX
50
50
UNITS
ns
ns
ns
ns
ns
ns
ns
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